From: Alistair Francis <alistair.francis@opensource.wdc.com>
To: qemu-devel@nongnu.org
Cc: alistair23@gmail.com, "Bernhard Beschow" <shentey@gmail.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 13/23] hw/vfio/pci-quirks: Resolve redundant property getters
Date: Wed, 25 May 2022 08:44:18 +1000 [thread overview]
Message-ID: <20220524224428.552334-14-alistair.francis@opensource.wdc.com> (raw)
In-Reply-To: <20220524224428.552334-1-alistair.francis@opensource.wdc.com>
From: Bernhard Beschow <shentey@gmail.com>
The QOM API already provides getters for uint64 and uint32 values, so reuse
them.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220301225220.239065-2-shentey@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/vfio/pci-quirks.c | 34 +++++++++-------------------------
1 file changed, 9 insertions(+), 25 deletions(-)
diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c
index 0cf69a8c6d..f0147a050a 100644
--- a/hw/vfio/pci-quirks.c
+++ b/hw/vfio/pci-quirks.c
@@ -1565,22 +1565,6 @@ static int vfio_add_nv_gpudirect_cap(VFIOPCIDevice *vdev, Error **errp)
return 0;
}
-static void vfio_pci_nvlink2_get_tgt(Object *obj, Visitor *v,
- const char *name,
- void *opaque, Error **errp)
-{
- uint64_t tgt = (uintptr_t) opaque;
- visit_type_uint64(v, name, &tgt, errp);
-}
-
-static void vfio_pci_nvlink2_get_link_speed(Object *obj, Visitor *v,
- const char *name,
- void *opaque, Error **errp)
-{
- uint32_t link_speed = (uint32_t)(uintptr_t) opaque;
- visit_type_uint32(v, name, &link_speed, errp);
-}
-
int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp)
{
int ret;
@@ -1618,9 +1602,9 @@ int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp)
nv2reg->size, p);
QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next);
- object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64",
- vfio_pci_nvlink2_get_tgt, NULL, NULL,
- (void *) (uintptr_t) cap->tgt);
+ object_property_add_uint64_ptr(OBJECT(vdev), "nvlink2-tgt",
+ (uint64_t *) &cap->tgt,
+ OBJ_PROP_FLAG_READ);
trace_vfio_pci_nvidia_gpu_setup_quirk(vdev->vbasedev.name, cap->tgt,
nv2reg->size);
free_exit:
@@ -1679,15 +1663,15 @@ int vfio_pci_nvlink2_init(VFIOPCIDevice *vdev, Error **errp)
QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next);
}
- object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64",
- vfio_pci_nvlink2_get_tgt, NULL, NULL,
- (void *) (uintptr_t) captgt->tgt);
+ object_property_add_uint64_ptr(OBJECT(vdev), "nvlink2-tgt",
+ (uint64_t *) &captgt->tgt,
+ OBJ_PROP_FLAG_READ);
trace_vfio_pci_nvlink2_setup_quirk_ssatgt(vdev->vbasedev.name, captgt->tgt,
atsdreg->size);
- object_property_add(OBJECT(vdev), "nvlink2-link-speed", "uint32",
- vfio_pci_nvlink2_get_link_speed, NULL, NULL,
- (void *) (uintptr_t) capspeed->link_speed);
+ object_property_add_uint32_ptr(OBJECT(vdev), "nvlink2-link-speed",
+ &capspeed->link_speed,
+ OBJ_PROP_FLAG_READ);
trace_vfio_pci_nvlink2_setup_quirk_lnkspd(vdev->vbasedev.name,
capspeed->link_speed);
free_exit:
--
2.35.3
next prev parent reply other threads:[~2022-05-24 23:06 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-24 22:44 [PULL 00/23] riscv-to-apply queue Alistair Francis
2022-05-24 22:44 ` [PULL 01/23] target/riscv: Fix VS mode hypervisor CSR access Alistair Francis
2022-05-24 22:44 ` [PULL 02/23] target/riscv: rvv: Fix early exit condition for whole register load/store Alistair Francis
2022-05-24 22:44 ` [PULL 03/23] hw/intc: Pass correct hartid while updating mtimecmp Alistair Francis
2022-05-24 22:44 ` [PULL 04/23] target/riscv: Move Zhinx* extensions on ISA string Alistair Francis
2022-05-24 22:44 ` [PULL 05/23] target/riscv: Add short-isa-string option Alistair Francis
2022-05-24 22:44 ` [PULL 06/23] hw/riscv: Make CPU config error handling generous (virt/spike) Alistair Francis
2022-05-24 22:44 ` [PULL 07/23] hw/riscv: Make CPU config error handling generous (sifive_e/u/opentitan) Alistair Francis
2022-05-24 22:44 ` [PULL 08/23] target/riscv: Fix coding style on "G" expansion Alistair Francis
2022-05-24 22:44 ` [PULL 09/23] target/riscv: Disable "G" by default Alistair Francis
2022-05-24 22:44 ` [PULL 10/23] target/riscv: Change "G" expansion Alistair Francis
2022-05-24 22:44 ` [PULL 11/23] target/riscv: FP extension requirements Alistair Francis
2022-05-24 22:44 ` [PULL 12/23] target/riscv: Move/refactor ISA extension checks Alistair Francis
2022-05-24 22:44 ` Alistair Francis [this message]
2022-05-24 22:44 ` [PULL 14/23] hw/riscv/sifive_u: Resolve redundant property accessors Alistair Francis
2022-05-24 22:44 ` [PULL 15/23] target/riscv: check 'I' and 'E' after checking 'G' in riscv_cpu_realize Alistair Francis
2022-05-24 22:44 ` [PULL 16/23] target/riscv: Fix typo of mimpid cpu option Alistair Francis
2022-05-24 22:44 ` [PULL 17/23] target/riscv: Fix csr number based privilege checking Alistair Francis
2022-05-24 22:44 ` [PULL 18/23] target/riscv: Fix hstatus.GVA bit setting for traps taken from HS-mode Alistair Francis
2022-05-24 22:44 ` [PULL 19/23] target/riscv: Set [m|s]tval for both illegal and virtual instruction traps Alistair Francis
2022-05-24 22:44 ` [PULL 20/23] hw/riscv: virt: Fix interrupt parent for dynamic platform devices Alistair Francis
2022-05-24 22:44 ` [PULL 21/23] target/riscv: add zicsr/zifencei to isa_string Alistair Francis
2022-05-24 22:44 ` [PULL 22/23] hw/core: Sync uboot_image.h from U-Boot v2022.01 Alistair Francis
2022-05-24 22:44 ` [PULL 23/23] hw/core: loader: Set is_linux to true for VxWorks uImage Alistair Francis
2022-05-25 3:18 ` [PULL 00/23] riscv-to-apply queue Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220524224428.552334-14-alistair.francis@opensource.wdc.com \
--to=alistair.francis@opensource.wdc.com \
--cc=alistair.francis@wdc.com \
--cc=alistair23@gmail.com \
--cc=f4bug@amsat.org \
--cc=qemu-devel@nongnu.org \
--cc=shentey@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.