From: Siddharth Vadapalli <s-vadapalli@ti.com>
To: <davem@davemloft.net>, <edumazet@google.com>, <kuba@kernel.org>,
<pabeni@redhat.com>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <linux@armlinux.org.uk>,
<vladimir.oltean@nxp.com>, <grygorii.strashko@ti.com>,
<vigneshr@ti.com>, <nsekhar@ti.com>
Cc: <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <kishon@ti.com>,
Siddharth Vadapalli <s-vadapalli@ti.com>
Subject: [PATCH 2/3] net: ethernet: ti: am65-cpsw: Add support for QSGMII mode
Date: Tue, 31 May 2022 17:00:57 +0530 [thread overview]
Message-ID: <20220531113058.23708-3-s-vadapalli@ti.com> (raw)
In-Reply-To: <20220531113058.23708-1-s-vadapalli@ti.com>
Enable QSGMII mode in am65-cpsw driver.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
drivers/net/ethernet/ti/am65-cpsw-nuss.c | 13 ++++++++++++-
drivers/net/ethernet/ti/am65-cpsw-nuss.h | 1 +
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
index 77bdda97b2b0..462f63313fb3 100644
--- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
@@ -74,6 +74,9 @@
#define AM65_CPSW_PORTN_REG_TS_VLAN_LTYPE_REG 0x318
#define AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2 0x31C
+#define AM65_CPSW_SGMII_CONTROL_REG 0x010
+#define AM65_CPSW_SGMII_CONTROL_MR_AN_ENABLE BIT(0)
+
#define AM65_CPSW_CTL_VLAN_AWARE BIT(1)
#define AM65_CPSW_CTL_P0_ENABLE BIT(2)
#define AM65_CPSW_CTL_P0_TX_CRC_REMOVE BIT(13)
@@ -1409,7 +1412,13 @@ static const struct net_device_ops am65_cpsw_nuss_netdev_ops = {
static void am65_cpsw_nuss_mac_config(struct phylink_config *config, unsigned int mode,
const struct phylink_link_state *state)
{
- /* Currently not used */
+ struct am65_cpsw_slave_data *slave = container_of(config, struct am65_cpsw_slave_data,
+ phylink_config);
+ struct am65_cpsw_port *port = container_of(slave, struct am65_cpsw_port, slave);
+
+ if (state->interface == PHY_INTERFACE_MODE_QSGMII)
+ writel(AM65_CPSW_SGMII_CONTROL_MR_AN_ENABLE,
+ port->sgmii_base + AM65_CPSW_SGMII_CONTROL_REG);
}
static void am65_cpsw_nuss_mac_link_down(struct phylink_config *config, unsigned int mode,
@@ -1846,6 +1855,7 @@ static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common)
port->common = common;
port->port_base = common->cpsw_base + AM65_CPSW_NU_PORTS_BASE +
AM65_CPSW_NU_PORTS_OFFSET * (port_id);
+ port->sgmii_base = common->ss_base + AM65_CPSW_SGMII_BASE * (port_id);
port->stat_base = common->cpsw_base + AM65_CPSW_NU_STATS_BASE +
(AM65_CPSW_NU_STATS_PORT_OFFSET * port_id);
port->name = of_get_property(port_np, "label", NULL);
@@ -1981,6 +1991,7 @@ am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx)
port->slave.phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD;
phy_interface_set_rgmii(port->slave.phylink_config.supported_interfaces);
+ __set_bit(PHY_INTERFACE_MODE_QSGMII, port->slave.phylink_config.supported_interfaces);
phylink = phylink_create(&port->slave.phylink_config,
of_node_to_fwnode(port->slave.phy_node),
diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.h b/drivers/net/ethernet/ti/am65-cpsw-nuss.h
index ac945631bf2f..8b6297e268ec 100644
--- a/drivers/net/ethernet/ti/am65-cpsw-nuss.h
+++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.h
@@ -46,6 +46,7 @@ struct am65_cpsw_port {
const char *name;
u32 port_id;
void __iomem *port_base;
+ void __iomem *sgmii_base;
void __iomem *stat_base;
void __iomem *fetch_ram_base;
bool disabled;
--
2.36.1
next prev parent reply other threads:[~2022-05-31 11:32 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-31 11:30 [PATCH 0/3] Add support for QSGMII mode to am65-cpsw driver Siddharth Vadapalli
2022-05-31 11:30 ` [PATCH 1/3] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update bindings for J7200 CPSW5G Siddharth Vadapalli
2022-05-31 11:30 ` Siddharth Vadapalli [this message]
2022-05-31 11:50 ` [PATCH 2/3] net: ethernet: ti: am65-cpsw: Add support for QSGMII mode Russell King (Oracle)
2022-06-01 6:05 ` Siddharth Vadapalli
2022-05-31 11:30 ` [PATCH 3/3] net: ethernet: ti: am65-cpsw: Move phy_set_mode_ext() to correct location Siddharth Vadapalli
2022-05-31 11:55 ` Russell King (Oracle)
2022-06-01 6:09 ` Siddharth Vadapalli
2022-06-01 8:29 ` Russell King (Oracle)
2022-06-01 9:29 ` Siddharth Vadapalli
2022-06-01 9:55 ` Russell King (Oracle)
2022-06-01 11:47 ` Siddharth Vadapalli
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