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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 1/9] drm/i915: Split g4x_compute_pipe_wm() into two
Date: Wed, 22 Jun 2022 18:54:44 +0300	[thread overview]
Message-ID: <20220622155452.32587-2-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20220622155452.32587-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Split g4x_compute_pipe_wm() into two halves. The first half computes
the new raw watermarks, and the second half munges those up into real
watermarks for the particular pipe.

We can reuse the second half for watermark sanitation as well.

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 54 +++++++++++++++++++--------------
 1 file changed, 31 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9b7e93ca1ff9..395ed3c832d6 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1376,34 +1376,14 @@ static bool g4x_compute_fbc_en(const struct g4x_wm_state *wm_state,
 	return true;
 }
 
-static int g4x_compute_pipe_wm(struct intel_atomic_state *state,
-			       struct intel_crtc *crtc)
+static int _g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 {
-	struct intel_crtc_state *crtc_state =
-		intel_atomic_get_new_crtc_state(state, crtc);
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
 	u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
 	const struct g4x_pipe_wm *raw;
-	const struct intel_plane_state *old_plane_state;
-	const struct intel_plane_state *new_plane_state;
-	struct intel_plane *plane;
 	enum plane_id plane_id;
-	int i, level;
-	unsigned int dirty = 0;
-
-	for_each_oldnew_intel_plane_in_state(state, plane,
-					     old_plane_state,
-					     new_plane_state, i) {
-		if (new_plane_state->hw.crtc != &crtc->base &&
-		    old_plane_state->hw.crtc != &crtc->base)
-			continue;
-
-		if (g4x_raw_plane_wm_compute(crtc_state, new_plane_state))
-			dirty |= BIT(plane->id);
-	}
-
-	if (!dirty)
-		return 0;
+	int level;
 
 	level = G4X_WM_LEVEL_NORMAL;
 	if (!g4x_raw_crtc_wm_is_valid(crtc_state, level))
@@ -1456,6 +1436,34 @@ static int g4x_compute_pipe_wm(struct intel_atomic_state *state,
 	return 0;
 }
 
+static int g4x_compute_pipe_wm(struct intel_atomic_state *state,
+			       struct intel_crtc *crtc)
+{
+	struct intel_crtc_state *crtc_state =
+		intel_atomic_get_new_crtc_state(state, crtc);
+	const struct intel_plane_state *old_plane_state;
+	const struct intel_plane_state *new_plane_state;
+	struct intel_plane *plane;
+	unsigned int dirty = 0;
+	int i;
+
+	for_each_oldnew_intel_plane_in_state(state, plane,
+					     old_plane_state,
+					     new_plane_state, i) {
+		if (new_plane_state->hw.crtc != &crtc->base &&
+		    old_plane_state->hw.crtc != &crtc->base)
+			continue;
+
+		if (g4x_raw_plane_wm_compute(crtc_state, new_plane_state))
+			dirty |= BIT(plane->id);
+	}
+
+	if (!dirty)
+		return 0;
+
+	return _g4x_compute_pipe_wm(crtc_state);
+}
+
 static int g4x_compute_intermediate_wm(struct intel_atomic_state *state,
 				       struct intel_crtc *crtc)
 {
-- 
2.35.1


  reply	other threads:[~2022-06-22 15:55 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
2022-06-22 15:54 ` Ville Syrjala [this message]
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 2/9] drm/i915: Split vlv_compute_pipe_wm() into two Ville Syrjala
2022-09-21 15:07   ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Simplify up g4x watermark sanitation Ville Syrjala
2022-09-21 15:10   ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 4/9] drm/i915: Simplify up vlv " Ville Syrjala
2022-09-21 15:13   ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: Add missing invalidate to g4x wm readout Ville Syrjala
2022-09-21 15:14   ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes Ville Syrjala
2022-10-07  5:57   ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms Ville Syrjala
2022-10-07  6:01   ` Lisovskiy, Stanislav
2022-10-07  6:21     ` Ville Syrjälä
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Write watermarks for disabled pipes " Ville Syrjala
2022-10-07  6:03   ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 9/9] drm/i915: Enable atomic by default on ctg/elk Ville Syrjala
2022-06-23 18:34   ` Jani Nikula
2022-06-22 23:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev3) Patchwork
2022-06-27 11:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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