[PATCH v12 10/13] fpga: zynqmp: reduce zynqmppl_load() code

From: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
To: u-boot@lists.denx.de
Cc: Michal Simek <michal.simek@xilinx.com>,
	Adrian Fiergolski <adrian.fiergolski@fastree3d.com>,
	Ricardo Salveti <ricardo@foundries.io>,
	Jorge Ramirez-Ortiz <jorge@foundries.io>,
	Igor Opaniuk <igor.opaniuk@foundries.io>,
	Oleksandr Suvorov <oleksandr.suvorov@foundries.io>,
	Michal Simek <michal.simek@amd.com>
Subject: [PATCH v12 10/13] fpga: zynqmp: reduce zynqmppl_load() code
Date: Fri, 22 Jul 2022 17:16:11 +0300	[thread overview]
Message-ID: <20220722141614.297383-11-oleksandr.suvorov@foundries.io> (raw)
In-Reply-To: <20220722141614.297383-10-oleksandr.suvorov@foundries.io>

Reduce the function code by calling xilinx_pm_request() once only.
Use the same variable bsize_req to store either bstream size in bytes
or an address of bstream size according to a type required by the
firmware version. Remove obsolete debug().

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
---

Changes in v12:
- fix a commit message
- remove obsolete debug() message

 drivers/fpga/zynqmppl.c | 17 ++++++-----------
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index a0624567882..2791f931861 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -207,38 +207,33 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
 	ulong bin_buf;
 	int ret;
 	u32 buf_lo, buf_hi;
+	u32 bsize_req = (u32)bsize;
 	u32 ret_payload[PAYLOAD_ARG_CNT];
-	bool xilfpga_old = false;
 
 	if (zynqmp_firmware_version() <= PMUFW_V1_0) {
 		puts("WARN: PMUFW v1.0 or less is detected\n");
 		puts("WARN: Not all bitstream formats are supported\n");
 		puts("WARN: Please upgrade PMUFW\n");
-		xilfpga_old = true;
 		if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, &swap))
 			return FPGA_FAIL;
 		bsizeptr = (u32 *)&bsize;
 		flush_dcache_range((ulong)bsizeptr,
 				   (ulong)bsizeptr + sizeof(size_t));
+		bsize_req = (u32)(uintptr_t)bsizeptr;
 		bstype |= BIT(ZYNQMP_FPGA_BIT_NS);
+	} else {
+		bstype = 0;
 	}
 
 	bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap);
 
-	debug("%s called!\n", __func__);
 	flush_dcache_range(bin_buf, bin_buf + bsize);
 
 	buf_lo = (u32)bin_buf;
 	buf_hi = upper_32_bits(bin_buf);
 
-	if (xilfpga_old)
-		ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo,
-					buf_hi, (u32)(uintptr_t)bsizeptr,
-					bstype, ret_payload);
-	else
-		ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo,
-					buf_hi, (u32)bsize, 0, ret_payload);
-
+	ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo, buf_hi,
+				bsize_req, bstype, ret_payload);
 	if (ret)
 		printf("PL FPGA LOAD failed with err: 0x%08x\n", ret);
 
-- 
2.36.1

