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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH v4 14/17] drm/i915: Add intel_panel_highest_mode()
Date: Wed,  7 Sep 2022 12:10:54 +0300	[thread overview]
Message-ID: <20220907091057.11572-15-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20220907091057.11572-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add a function to get the fixed_mode with the highest clock.
The plan is to use this for the link bw calculation on seamless
DRRS panels so that we alwasy end up with the same link params
regardless of the requested refresh rate. This will allow fastset
to do seamless refresh rate changes based on userspace request
instead of having to go for a full modeset.

TODO: the function name isn't great

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_panel.c | 15 +++++++++++++++
 drivers/gpu/drm/i915/display/intel_panel.h |  3 +++
 2 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index d27a220def00..a3a3f9fe4342 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -114,6 +114,21 @@ intel_panel_downclock_mode(struct intel_connector *connector,
 	return best_mode;
 }
 
+const struct drm_display_mode *
+intel_panel_highest_mode(struct intel_connector *connector,
+			 const struct drm_display_mode *adjusted_mode)
+{
+	const struct drm_display_mode *fixed_mode, *best_mode = adjusted_mode;
+
+	/* pick the fixed_mode that has the highest clock */
+	list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) {
+		if (fixed_mode->clock > best_mode->clock)
+			best_mode = fixed_mode;
+	}
+
+	return best_mode;
+}
+
 int intel_panel_get_modes(struct intel_connector *connector)
 {
 	const struct drm_display_mode *fixed_mode;
diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
index b087c0c3cc6d..eff3ffd3d082 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.h
+++ b/drivers/gpu/drm/i915/display/intel_panel.h
@@ -31,6 +31,9 @@ intel_panel_fixed_mode(struct intel_connector *connector,
 const struct drm_display_mode *
 intel_panel_downclock_mode(struct intel_connector *connector,
 			   const struct drm_display_mode *adjusted_mode);
+const struct drm_display_mode *
+intel_panel_highest_mode(struct intel_connector *connector,
+			 const struct drm_display_mode *adjusted_mode);
 int intel_panel_get_modes(struct intel_connector *connector);
 enum drrs_type intel_panel_drrs_type(struct intel_connector *connector);
 enum drm_mode_status
-- 
2.35.1


  parent reply	other threads:[~2022-09-07  9:12 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-07  9:10 [Intel-gfx] [PATCH v4 00/17] drm/i915: Make fastset not suck and allow seamless M/N changes Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 01/17] drm/i915: Relocate intel_crtc_dotclock() Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 02/17] drm/i915: Shuffle some PLL code around Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 03/17] drm/i915: Extract HAS_DOUBLE_BUFFERED_M_N() Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 04/17] drm/i915/dsi: Extract {vlv, bxt}_get_pclk() Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 05/17] drm/i915: Do .crtc_compute_clock() earlier Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 06/17] drm/i915: Reassign DPLLs only for crtcs going throug .compute_config() Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 07/17] drm/i915: Feed the DPLL output freq back into crtc_state Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 08/17] drm/i915: Compute clocks earlier Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 09/17] drm/i915: Make M/N checks non-fuzzy Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 10/17] drm/i915: Make all clock " Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 11/17] drm/i915: Set active dpll early for icl+ Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 12/17] drm/i915: Nuke fastet state copy hacks Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 13/17] drm/i915: Skip intel_modeset_pipe_config_late() if the pipe is not enabled Ville Syrjala
2022-09-07  9:10 ` Ville Syrjala [this message]
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 15/17] drm/i915: Allow M/N change during fastset on bdw+ Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 16/17] drm/i915: Use a fixed N value always Ville Syrjala
2022-09-07  9:10 ` [Intel-gfx] [PATCH v4 17/17] drm/i915: Round TMDS clock to nearest Ville Syrjala
2022-09-07 11:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Make fastset not suck and allow seamless M/N changes (rev7) Patchwork
2022-09-07 11:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-09-07 12:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-07 17:34 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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