From: Ping-Ke Shih <pkshih@realtek.com>
To: <kvalo@kernel.org>
Cc: <phhuang@realtek.com>, <linux-wireless@vger.kernel.org>
Subject: [PATCH 3/7] wifi: rtw89: pci: update LTR settings
Date: Fri, 16 Sep 2022 11:38:07 +0800 [thread overview]
Message-ID: <20220916033811.13862-4-pkshih@realtek.com> (raw)
In-Reply-To: <20220916033811.13862-1-pkshih@realtek.com>
Modify PCI LTR control flow and LTR idle latency to improve power save
efficiency.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/pci.c | 8 ++++----
drivers/net/wireless/realtek/rtw89/reg.h | 1 +
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/pci.c b/drivers/net/wireless/realtek/rtw89/pci.c
index d2cbe0468cd78..71cc4e9093718 100644
--- a/drivers/net/wireless/realtek/rtw89/pci.c
+++ b/drivers/net/wireless/realtek/rtw89/pci.c
@@ -2491,15 +2491,15 @@ int rtw89_pci_ltr_set(struct rtw89_dev *rtwdev, bool en)
if (rtw89_pci_ltr_is_err_reg_val(val))
return -EINVAL;
- rtw89_write32_clr(rtwdev, R_AX_LTR_CTRL_0, B_AX_LTR_HW_EN);
- rtw89_write32_set(rtwdev, R_AX_LTR_CTRL_0, B_AX_LTR_EN);
+ rtw89_write32_set(rtwdev, R_AX_LTR_CTRL_0, B_AX_LTR_HW_EN | B_AX_LTR_EN |
+ B_AX_LTR_WD_NOEMP_CHK);
rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_0, B_AX_LTR_SPACE_IDX_MASK,
PCI_LTR_SPC_500US);
rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_0, B_AX_LTR_IDLE_TIMER_IDX_MASK,
- PCI_LTR_IDLE_TIMER_800US);
+ PCI_LTR_IDLE_TIMER_3_2MS);
rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_1, B_AX_LTR_RX0_TH_MASK, 0x28);
rtw89_write32_mask(rtwdev, R_AX_LTR_CTRL_1, B_AX_LTR_RX1_TH_MASK, 0x28);
- rtw89_write32(rtwdev, R_AX_LTR_IDLE_LATENCY, 0x88e088e0);
+ rtw89_write32(rtwdev, R_AX_LTR_IDLE_LATENCY, 0x90039003);
rtw89_write32(rtwdev, R_AX_LTR_ACTIVE_LATENCY, 0x880b880b);
return 0;
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index 32605841c98c4..aa164ec0cc5af 100644
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -479,6 +479,7 @@
#define R_AX_LTR_CTRL_0 0x8410
#define B_AX_LTR_SPACE_IDX_MASK GENMASK(13, 12)
#define B_AX_LTR_IDLE_TIMER_IDX_MASK GENMASK(10, 8)
+#define B_AX_LTR_WD_NOEMP_CHK BIT(6)
#define B_AX_APP_LTR_ACT BIT(5)
#define B_AX_APP_LTR_IDLE BIT(4)
#define B_AX_LTR_EN BIT(1)
--
2.25.1
next prev parent reply other threads:[~2022-09-16 3:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-16 3:38 [PATCH 0/7] wifi: rtw89: correct MAC and TX descriptor settings Ping-Ke Shih
2022-09-16 3:38 ` [PATCH 1/7] wifi: rtw89: initialize DMA of CMAC Ping-Ke Shih
2022-09-19 10:05 ` Kalle Valo
2022-09-16 3:38 ` [PATCH 2/7] wifi: rtw89: mac: set NAV upper to 25ms Ping-Ke Shih
2022-09-16 3:38 ` Ping-Ke Shih [this message]
2022-09-16 3:38 ` [PATCH 4/7] wifi: rtw89: reset halt registers before turn on wifi CPU Ping-Ke Shih
2022-09-16 3:38 ` [PATCH 5/7] wifi: rtw89: free unused skb to prevent memory leak Ping-Ke Shih
2022-09-16 3:38 ` [PATCH 6/7] wifi: rtw89: fix rx filter after scan Ping-Ke Shih
2022-09-16 3:38 ` [PATCH 7/7] wifi: rtw89: 8852c: add multi-port ID to TX descriptor Ping-Ke Shih
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