From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: intel-gfx@lists.freedesktop.org,
Lionel G Landwerlin <lionel.g.landwerlin@intel.com>,
Ashutosh Dixit <ashutosh.dixit@intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Subject: [Intel-gfx] [PATCH v2 02/15] drm/i915/perf: Add OAG and OAR formats for DG2
Date: Fri, 23 Sep 2022 20:11:41 +0000 [thread overview]
Message-ID: <20220923201154.283784-3-umesh.nerlige.ramappa@intel.com> (raw)
In-Reply-To: <20220923201154.283784-1-umesh.nerlige.ramappa@intel.com>
Add new OA formats for DG2. Some of the newer OA formats are not
multples of 64 bytes and are not powers of 2. For those formats, adjust
hw_tail accordingly when checking for new reports.
v2:
- Update commit title (Ashutosh)
- Coding style fixes (Lionel)
- 64 bit OA formats need UMD changes in GPUvis, drop for now and send in a
separate series with UMD changes
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> #1
Acked-by: Ashutosh Dixit <ashutosh.dixit@intel.com> #1
---
drivers/gpu/drm/i915/i915_perf.c | 7 +++++++
include/uapi/drm/i915_drm.h | 4 ++++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 315662329be3..41e9f620ee31 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -320,6 +320,8 @@ static const struct i915_oa_format oa_formats[I915_OA_FORMAT_MAX] = {
[I915_OA_FORMAT_A12] = { 0, 64 },
[I915_OA_FORMAT_A12_B8_C8] = { 2, 128 },
[I915_OA_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
+ [I915_OAR_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
+ [I915_OA_FORMAT_A24u40_A14u32_B8_C8] = { 5, 256 },
};
#define SAMPLE_OA_REPORT (1<<0)
@@ -4517,6 +4519,11 @@ static void oa_init_supported_formats(struct i915_perf *perf)
oa_format_add(perf, I915_OA_FORMAT_C4_B8);
break;
+ case INTEL_DG2:
+ oa_format_add(perf, I915_OAR_FORMAT_A32u40_A4u32_B8_C8);
+ oa_format_add(perf, I915_OA_FORMAT_A24u40_A14u32_B8_C8);
+ break;
+
default:
MISSING_CASE(platform);
}
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 520ad2691a99..8b59590e06d4 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -2650,6 +2650,10 @@ enum drm_i915_oa_format {
I915_OA_FORMAT_A12_B8_C8,
I915_OA_FORMAT_A32u40_A4u32_B8_C8,
+ /* DG2 */
+ I915_OAR_FORMAT_A32u40_A4u32_B8_C8,
+ I915_OA_FORMAT_A24u40_A14u32_B8_C8,
+
I915_OA_FORMAT_MAX /* non-ABI */
};
--
2.25.1
next prev parent reply other threads:[~2022-09-23 20:12 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-23 20:11 [Intel-gfx] [PATCH v2 00/15] Add DG2 OA support Umesh Nerlige Ramappa
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 01/15] drm/i915/perf: Fix OA filtering logic for GuC mode Umesh Nerlige Ramappa
2022-09-23 20:11 ` Umesh Nerlige Ramappa [this message]
2022-09-24 4:08 ` [Intel-gfx] [PATCH v2 02/15] drm/i915/perf: Add OAG and OAR formats for DG2 Dixit, Ashutosh
2022-09-26 18:11 ` Umesh Nerlige Ramappa
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 03/15] drm/i915/perf: Fix noa wait predication " Umesh Nerlige Ramappa
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 04/15] drm/i915/perf: Determine gen12 oa ctx offset at runtime Umesh Nerlige Ramappa
2022-09-27 23:24 ` Dixit, Ashutosh
2022-09-30 21:42 ` Umesh Nerlige Ramappa
2022-09-30 23:09 ` Dixit, Ashutosh
2022-10-08 1:06 ` Umesh Nerlige Ramappa
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 05/15] drm/i915/perf: Enable commands per clock reporting in OA Umesh Nerlige Ramappa
2022-09-26 15:55 ` Dixit, Ashutosh
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 06/15] drm/i915/perf: Simply use stream->ctx Umesh Nerlige Ramappa
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 07/15] drm/i915/perf: Move gt-specific data from i915->perf to gt->perf Umesh Nerlige Ramappa
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 08/15] drm/i915/perf: Replace gt->perf.lock with stream->lock for file ops Umesh Nerlige Ramappa
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 09/15] drm/i915/perf: Use gt-specific ggtt for OA and noa-wait buffers Umesh Nerlige Ramappa
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 10/15] drm/i915/perf: Store a pointer to oa_format in oa_buffer Umesh Nerlige Ramappa
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 11/15] drm/i915/perf: Add Wa_1508761755:dg2 Umesh Nerlige Ramappa
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 12/15] drm/i915/perf: Apply Wa_18013179988 Umesh Nerlige Ramappa
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 13/15] drm/i915/perf: Save/restore EU flex counters across reset Umesh Nerlige Ramappa
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 14/15] drm/i915/guc: Support OA when Wa_16011777198 is enabled Umesh Nerlige Ramappa
2022-09-26 15:56 ` Dixit, Ashutosh
2022-09-26 18:19 ` Umesh Nerlige Ramappa
2022-09-26 21:17 ` Belgaumkar, Vinay
2022-09-26 23:28 ` Dixit, Ashutosh
2022-09-27 16:11 ` Umesh Nerlige Ramappa
2022-09-27 17:34 ` Dixit, Ashutosh
2022-09-27 17:51 ` Dixit, Ashutosh
2022-09-23 20:11 ` [Intel-gfx] [PATCH v2 15/15] drm/i915/perf: Enable OA for DG2 Umesh Nerlige Ramappa
2022-09-23 21:44 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add DG2 OA support (rev3) Patchwork
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