From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
Serge Semin <fancer.lancer@gmail.com>,
Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
Philipp Zabel <p.zabel@pengutronix.de>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
<linux-clk@vger.kernel.org>, <linux-mips@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH RESEND v12 2/8] clk: baikal-t1: Fix invalid xGMAC PTP clock divider
Date: Fri, 30 Sep 2022 01:53:56 +0300 [thread overview]
Message-ID: <20220929225402.9696-3-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20220929225402.9696-1-Sergey.Semin@baikalelectronics.ru>
Most likely due to copy-paste mistake the divider has been set to 10 while
according to the SoC reference manual it's supposed to be 8 thus having
PTP clock frequency of 156.25 MHz.
Fixes: 353afa3a8d2e ("clk: Add Baikal-T1 CCU Dividers driver")
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
---
drivers/clk/baikal-t1/clk-ccu-div.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/baikal-t1/clk-ccu-div.c b/drivers/clk/baikal-t1/clk-ccu-div.c
index f141fda12b09..ea77eec40ddd 100644
--- a/drivers/clk/baikal-t1/clk-ccu-div.c
+++ b/drivers/clk/baikal-t1/clk-ccu-div.c
@@ -207,7 +207,7 @@ static const struct ccu_div_info sys_info[] = {
CCU_DIV_GATE_INFO(CCU_SYS_XGMAC_REF_CLK, "sys_xgmac_ref_clk",
"eth_clk", CCU_SYS_XGMAC_BASE, 8),
CCU_DIV_FIXED_INFO(CCU_SYS_XGMAC_PTP_CLK, "sys_xgmac_ptp_clk",
- "eth_clk", 10),
+ "eth_clk", 8),
CCU_DIV_GATE_INFO(CCU_SYS_USB_CLK, "sys_usb_clk",
"eth_clk", CCU_SYS_USB_BASE, 10),
CCU_DIV_VAR_INFO(CCU_SYS_PVT_CLK, "sys_pvt_clk",
--
2.37.3
next prev parent reply other threads:[~2022-10-01 1:22 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-29 22:53 [PATCH RESEND v12 0/8] clk/resets: baikal-t1: Add DDR/PCIe resets and xGMAC/SATA fixes Serge Semin
2022-09-29 22:53 ` [PATCH RESEND v12 1/8] clk: vc5: Fix 5P49V6901 outputs disabling when enabling FOD Serge Semin
2022-09-30 21:24 ` Stephen Boyd
2022-09-29 22:53 ` Serge Semin [this message]
2022-09-30 21:25 ` [PATCH RESEND v12 2/8] clk: baikal-t1: Fix invalid xGMAC PTP clock divider Stephen Boyd
2022-09-29 22:53 ` [PATCH RESEND v12 3/8] clk: baikal-t1: Add shared xGMAC ref/ptp clocks internal parent Serge Semin
2022-09-30 21:25 ` Stephen Boyd
2022-09-29 22:53 ` [PATCH RESEND v12 4/8] clk: baikal-t1: Add SATA internal ref clock buffer Serge Semin
2022-09-30 21:26 ` Stephen Boyd
2022-09-29 22:53 ` [PATCH RESEND v12 5/8] clk: baikal-t1: Move reset-controls code into a dedicated module Serge Semin
2022-09-30 21:26 ` Stephen Boyd
2022-09-29 22:54 ` [PATCH RESEND v12 6/8] dt-bindings: clk: baikal-t1: Add DDR/PCIe reset IDs Serge Semin
2022-09-30 21:27 ` Stephen Boyd
2022-09-29 22:54 ` [PATCH RESEND v12 7/8] clk: baikal-t1: Add DDR/PCIe directly controlled resets support Serge Semin
2022-09-30 21:27 ` Stephen Boyd
2022-09-29 22:54 ` [PATCH RESEND v12 8/8] clk: baikal-t1: Convert to platform device driver Serge Semin
2022-09-30 21:27 ` Stephen Boyd
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