From: Quentin Schulz <foss+uboot@0leil.net>
To: klaus.goger@theobroma-systems.com, sjg@chromium.org,
philipp.tomsich@vrull.eu, kever.yang@rock-chips.com
Cc: heiko@sntech.de, u-boot@lists.denx.de,
Quentin Schulz <quentin.schulz@theobroma-systems.com>,
Quentin Schulz <foss+uboot@0leil.net>
Subject: [PATCH v2 1/5] rockchip: px30: fix CONFIG_IRAM_BASE
Date: Mon, 17 Oct 2022 12:46:37 +0200 [thread overview]
Message-ID: <20221017-upstream-ringneck-v2-1-0f03912ebac2@theobroma-systems.com> (raw)
In-Reply-To: <20221017-upstream-ringneck-v2-0-0f03912ebac2@theobroma-systems.com>
From: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The IRAM on PX30 (or Int_MEM in datasheet) starts at 0xff0e0000 and not
0xff020000 as rightfully stated in the FIXME comment.
Let's fix it so that BROM_BOOTSOURCE_ID_ADDR points to the correct
address for PX30.
Fixes: 46281a76bee3 ("rockchip: add core px30 headers")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
---
include/configs/px30_common.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 49d1878ebd..c93bb053a5 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -10,8 +10,7 @@
#define CONFIG_SYS_NS16550_MEM32
-/* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */
-#define CONFIG_IRAM_BASE 0xff020000
+#define CONFIG_IRAM_BASE 0xff0e0000
#define GICD_BASE 0xff131000
#define GICC_BASE 0xff132000
--
b4 0.10.1
next prev parent reply other threads:[~2022-10-17 10:47 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-17 10:46 [PATCH v2 0/5] add support for Theobroma Systems PX30-µQ7 (Ringneck) with Haikou devkit Quentin Schulz
2022-10-17 10:46 ` Quentin Schulz [this message]
2022-10-17 10:46 ` [PATCH v2 2/5] rockchip: px30: list possible SPL boot devices Quentin Schulz
2022-10-17 10:46 ` [PATCH v2 3/5] rockchip: px30: insert u-boot, spl-boot-device into U-Boot device tree Quentin Schulz
2022-10-17 10:46 ` [PATCH v2 4/5] arm64: dts: rockchip: sync px30 with linux-next Quentin Schulz
2022-10-17 10:46 ` [PATCH v2 5/5] rockchip: add support for PX30 Ringneck SoM on Haikou Devkit Quentin Schulz
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221017-upstream-ringneck-v2-1-0f03912ebac2@theobroma-systems.com \
--to=foss+uboot@0leil.net \
--cc=heiko@sntech.de \
--cc=kever.yang@rock-chips.com \
--cc=klaus.goger@theobroma-systems.com \
--cc=philipp.tomsich@vrull.eu \
--cc=quentin.schulz@theobroma-systems.com \
--cc=sjg@chromium.org \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.