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From: Akihiko Odaki <akihiko.odaki@daynix.com>
Cc: Jason Wang <jasowang@redhat.com>,
	Dmitry Fleytman <dmitry.fleytman@gmail.com>,
	Thomas Huth <thuth@redhat.com>,
	Laurent Vivier <lvivier@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
	"Michael S . Tsirkin" <mst@redhat.com>,
	Yan Vugenfirer <yvugenfi@redhat.com>,
	Yuri Benditovich <yuri.benditovich@daynix.com>,
	Sriram Yagnaraman <sriram.yagnaraman@est.tech>,
	Alexander Bulekov <alxndr@bu.edu>,
	Akihiko Odaki <akihiko.odaki@daynix.com>
Subject: [PATCH v4 05/28] e1000: Mask registers when writing
Date: Mon, 30 Jan 2023 22:46:52 +0900	[thread overview]
Message-ID: <20230130134715.76604-6-akihiko.odaki@daynix.com> (raw)
In-Reply-To: <20230130134715.76604-1-akihiko.odaki@daynix.com>

When a register has effective bits fewer than their width, the old code
inconsistently masked when writing or reading. Make the code consistent
by always masking when writing, and remove some code duplication.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
---
 hw/net/e1000.c | 84 +++++++++++++++++++-------------------------------
 1 file changed, 31 insertions(+), 53 deletions(-)

diff --git a/hw/net/e1000.c b/hw/net/e1000.c
index 9619a2e481..0925a99511 100644
--- a/hw/net/e1000.c
+++ b/hw/net/e1000.c
@@ -1062,30 +1062,6 @@ mac_readreg(E1000State *s, int index)
     return s->mac_reg[index];
 }
 
-static uint32_t
-mac_low4_read(E1000State *s, int index)
-{
-    return s->mac_reg[index] & 0xf;
-}
-
-static uint32_t
-mac_low11_read(E1000State *s, int index)
-{
-    return s->mac_reg[index] & 0x7ff;
-}
-
-static uint32_t
-mac_low13_read(E1000State *s, int index)
-{
-    return s->mac_reg[index] & 0x1fff;
-}
-
-static uint32_t
-mac_low16_read(E1000State *s, int index)
-{
-    return s->mac_reg[index] & 0xffff;
-}
-
 static uint32_t
 mac_icr_read(E1000State *s, int index)
 {
@@ -1138,11 +1114,17 @@ set_rdt(E1000State *s, int index, uint32_t val)
     }
 }
 
-static void
-set_16bit(E1000State *s, int index, uint32_t val)
-{
-    s->mac_reg[index] = val & 0xffff;
-}
+#define LOW_BITS_SET_FUNC(num)                             \
+    static void                                            \
+    set_##num##bit(E1000State *s, int index, uint32_t val) \
+    {                                                      \
+        s->mac_reg[index] = val & (BIT(num) - 1);          \
+    }
+
+LOW_BITS_SET_FUNC(4)
+LOW_BITS_SET_FUNC(11)
+LOW_BITS_SET_FUNC(13)
+LOW_BITS_SET_FUNC(16)
 
 static void
 set_dlen(E1000State *s, int index, uint32_t val)
@@ -1196,7 +1178,9 @@ static const readops macreg_readops[] = {
     getreg(XONRXC),   getreg(XONTXC),   getreg(XOFFRXC),  getreg(XOFFTXC),
     getreg(RFC),      getreg(RJC),      getreg(RNBC),     getreg(TSCTFC),
     getreg(MGTPRC),   getreg(MGTPDC),   getreg(MGTPTC),   getreg(GORCL),
-    getreg(GOTCL),
+    getreg(GOTCL),    getreg(RDFH),     getreg(RDFT),     getreg(RDFHS),
+    getreg(RDFTS),    getreg(RDFPC),    getreg(TDFH),     getreg(TDFT),
+    getreg(TDFHS),    getreg(TDFTS),    getreg(TDFPC),    getreg(AIT),
 
     [TOTH]    = mac_read_clr8,      [TORH]    = mac_read_clr8,
     [GOTCH]   = mac_read_clr8,      [GORCH]   = mac_read_clr8,
@@ -1214,22 +1198,15 @@ static const readops macreg_readops[] = {
     [MPTC]    = mac_read_clr4,
     [ICR]     = mac_icr_read,       [EECD]    = get_eecd,
     [EERD]    = flash_eerd_read,
-    [RDFH]    = mac_low13_read,     [RDFT]    = mac_low13_read,
-    [RDFHS]   = mac_low13_read,     [RDFTS]   = mac_low13_read,
-    [RDFPC]   = mac_low13_read,
-    [TDFH]    = mac_low11_read,     [TDFT]    = mac_low11_read,
-    [TDFHS]   = mac_low13_read,     [TDFTS]   = mac_low13_read,
-    [TDFPC]   = mac_low13_read,
-    [AIT]     = mac_low16_read,
 
     [CRCERRS ... MPC]     = &mac_readreg,
     [IP6AT ... IP6AT + 3] = &mac_readreg,    [IP4AT ... IP4AT + 6] = &mac_readreg,
-    [FFLT ... FFLT + 6]   = &mac_low11_read,
+    [FFLT ... FFLT + 6]   = &mac_readreg,
     [RA ... RA + 31]      = &mac_readreg,
     [WUPM ... WUPM + 31]  = &mac_readreg,
     [MTA ... MTA + 127]   = &mac_readreg,
     [VFTA ... VFTA + 127] = &mac_readreg,
-    [FFMT ... FFMT + 254] = &mac_low4_read,
+    [FFMT ... FFMT + 254] = &mac_readreg,
     [FFVT ... FFVT + 254] = &mac_readreg,
     [PBM ... PBM + 16383] = &mac_readreg,
 };
@@ -1241,26 +1218,27 @@ static const writeops macreg_writeops[] = {
     putreg(PBA),      putreg(EERD),     putreg(SWSM),     putreg(WUFC),
     putreg(TDBAL),    putreg(TDBAH),    putreg(TXDCTL),   putreg(RDBAH),
     putreg(RDBAL),    putreg(LEDCTL),   putreg(VET),      putreg(FCRUC),
-    putreg(TDFH),     putreg(TDFT),     putreg(TDFHS),    putreg(TDFTS),
-    putreg(TDFPC),    putreg(RDFH),     putreg(RDFT),     putreg(RDFHS),
-    putreg(RDFTS),    putreg(RDFPC),    putreg(IPAV),     putreg(WUC),
-    putreg(WUS),      putreg(AIT),
-
-    [TDLEN]  = set_dlen,   [RDLEN]  = set_dlen,       [TCTL] = set_tctl,
-    [TDT]    = set_tctl,   [MDIC]   = set_mdic,       [ICS]  = set_ics,
-    [TDH]    = set_16bit,  [RDH]    = set_16bit,      [RDT]  = set_rdt,
-    [IMC]    = set_imc,    [IMS]    = set_ims,        [ICR]  = set_icr,
-    [EECD]   = set_eecd,   [RCTL]   = set_rx_control, [CTRL] = set_ctrl,
-    [RDTR]   = set_16bit,  [RADV]   = set_16bit,      [TADV] = set_16bit,
-    [ITR]    = set_16bit,
+    putreg(IPAV),     putreg(WUC),
+    putreg(WUS),
+
+    [TDLEN]  = set_dlen,   [RDLEN]  = set_dlen,       [TCTL]  = set_tctl,
+    [TDT]    = set_tctl,   [MDIC]   = set_mdic,       [ICS]   = set_ics,
+    [TDH]    = set_16bit,  [RDH]    = set_16bit,      [RDT]   = set_rdt,
+    [IMC]    = set_imc,    [IMS]    = set_ims,        [ICR]   = set_icr,
+    [EECD]   = set_eecd,   [RCTL]   = set_rx_control, [CTRL]  = set_ctrl,
+    [RDTR]   = set_16bit,  [RADV]   = set_16bit,      [TADV]  = set_16bit,
+    [ITR]    = set_16bit,  [TDFH]   = set_11bit,      [TDFT]  = set_11bit,
+    [TDFHS]  = set_13bit,  [TDFTS]  = set_13bit,      [TDFPC] = set_13bit,
+    [RDFH]   = set_13bit,  [RDFT]   = set_13bit,      [RDFHS] = set_13bit,
+    [RDFTS]  = set_13bit,  [RDFPC]  = set_13bit,      [AIT]   = set_16bit,
 
     [IP6AT ... IP6AT + 3] = &mac_writereg, [IP4AT ... IP4AT + 6] = &mac_writereg,
-    [FFLT ... FFLT + 6]   = &mac_writereg,
+    [FFLT ... FFLT + 6]   = &set_11bit,
     [RA ... RA + 31]      = &mac_writereg,
     [WUPM ... WUPM + 31]  = &mac_writereg,
     [MTA ... MTA + 127]   = &mac_writereg,
     [VFTA ... VFTA + 127] = &mac_writereg,
-    [FFMT ... FFMT + 254] = &mac_writereg, [FFVT ... FFVT + 254] = &mac_writereg,
+    [FFMT ... FFMT + 254] = &set_4bit,     [FFVT ... FFVT + 254] = &mac_writereg,
     [PBM ... PBM + 16383] = &mac_writereg,
 };
 
-- 
2.39.1



  parent reply	other threads:[~2023-01-30 13:53 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-30 13:46 [PATCH v4 00/28] e1000x cleanups (preliminary for IGB) Akihiko Odaki
2023-01-30 13:46 ` [PATCH v4 01/28] e1000e: Fix the code style Akihiko Odaki
2023-01-30 13:46 ` [PATCH v4 02/28] hw/net: Add more MII definitions Akihiko Odaki
2023-01-30 13:46 ` [PATCH v4 03/28] fsl_etsec: Use hw/net/mii.h Akihiko Odaki
2023-01-30 13:46 ` [PATCH v4 04/28] e1000: " Akihiko Odaki
2023-01-30 13:46 ` Akihiko Odaki [this message]
2023-01-30 13:46 ` [PATCH v4 06/28] e1000e: Mask registers when writing Akihiko Odaki
2023-01-30 13:46 ` [PATCH v4 07/28] e1000: Use more constant definitions Akihiko Odaki
2023-01-30 13:46 ` [PATCH v4 08/28] e1000e: " Akihiko Odaki
2023-01-30 13:46 ` [PATCH v4 09/28] e1000: Use memcpy to intialize registers Akihiko Odaki
2023-01-30 13:46 ` [PATCH v4 10/28] e1000e: " Akihiko Odaki
2023-01-30 13:46 ` [PATCH v4 11/28] e1000e: Remove pending interrupt flags Akihiko Odaki
2023-01-30 13:46 ` [PATCH v4 12/28] e1000e: Improve software reset Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 13/28] e1000: Configure ResettableClass Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 14/28] e1000e: " Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 15/28] e1000e: Introduce e1000_rx_desc_union Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 16/28] e1000e: Set MII_ANER_NWAY Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 17/28] e1000e: Remove extra pointer indirection Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 18/28] net: Check L4 header size Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 19/28] e1000x: Alter the signature of e1000x_is_vlan_packet Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 20/28] net: Strip virtio-net header when dumping Akihiko Odaki
2023-01-30 15:12   ` Michael S. Tsirkin
2023-01-30 15:36     ` Akihiko Odaki
2023-01-30 15:47       ` Michael S. Tsirkin
2023-01-31  2:36         ` Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 21/28] hw/net/net_tx_pkt: Automatically determine if virtio-net header is used Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 22/28] hw/net/net_rx_pkt: Remove net_rx_pkt_has_virt_hdr Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 23/28] e1000e: Perform software segmentation for loopback Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 24/28] hw/net/net_tx_pkt: Implement TCP segmentation Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 25/28] hw/net/net_tx_pkt: Check the payload length Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 26/28] e1000e: Do not assert when MSI-X is disabled later Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 27/28] MAINTAINERS: Add Akihiko Odaki as a e1000e reviewer Akihiko Odaki
2023-01-30 13:47 ` [PATCH v4 28/28] MAINTAINERS: Add e1000e test files Akihiko Odaki

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