From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Markus Armbruster" <armbru@redhat.com>,
qemu-arm@nongnu.org, qemu-ppc@nongnu.org,
"Eduardo Habkost" <eduardo@habkost.net>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Paul Burton" <paulburton@kernel.org>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>
Subject: [PATCH v2 14/15] hw/mips: Declare all length properties as unsigned
Date: Fri, 3 Feb 2023 15:55:35 +0100 [thread overview]
Message-ID: <20230203145536.17585-15-philmd@linaro.org> (raw)
In-Reply-To: <20230203145536.17585-1-philmd@linaro.org>
Some length properties are signed, other unsigned:
hw/mips/cps.c:183: DEFINE_PROP_UINT32("num-vp", MIPSCPSState, num_vp, 1),
hw/mips/cps.c:184: DEFINE_PROP_UINT32("num-irq", MIPSCPSState, num_irq, 256),
hw/misc/mips_cmgcr.c:215: DEFINE_PROP_INT32("num-vp", MIPSGCRState, num_vps, 1),
hw/misc/mips_cpc.c:167: DEFINE_PROP_UINT32("num-vp", MIPSCPCState, num_vp, 0x1),
hw/misc/mips_itu.c:552: DEFINE_PROP_INT32("num-fifo", MIPSITUState, num_fifo,
hw/misc/mips_itu.c:554: DEFINE_PROP_INT32("num-semaphores", MIPSITUState,
Since negative values are not used (the minimum is '0'),
unify by declaring all properties as unsigned.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/intc/mips_gic.c | 4 ++--
hw/mips/boston.c | 2 +-
hw/mips/cps.c | 12 ++++++------
hw/mips/malta.c | 2 +-
hw/misc/mips_cmgcr.c | 2 +-
hw/misc/mips_itu.c | 4 ++--
include/hw/intc/mips_gic.h | 4 ++--
include/hw/misc/mips_cmgcr.h | 2 +-
include/hw/misc/mips_itu.h | 4 ++--
9 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/hw/intc/mips_gic.c b/hw/intc/mips_gic.c
index bda4549925..4bdc3b1bd1 100644
--- a/hw/intc/mips_gic.c
+++ b/hw/intc/mips_gic.c
@@ -439,8 +439,8 @@ static void mips_gic_realize(DeviceState *dev, Error **errp)
}
static Property mips_gic_properties[] = {
- DEFINE_PROP_INT32("num-vp", MIPSGICState, num_vps, 1),
- DEFINE_PROP_INT32("num-irq", MIPSGICState, num_irq, 256),
+ DEFINE_PROP_UINT32("num-vp", MIPSGICState, num_vps, 1),
+ DEFINE_PROP_UINT32("num-irq", MIPSGICState, num_irq, 256),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index a9d87f3437..21ad844519 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -702,7 +702,7 @@ static void boston_mach_init(MachineState *machine)
object_initialize_child(OBJECT(machine), "cps", &s->cps, TYPE_MIPS_CPS);
object_property_set_str(OBJECT(&s->cps), "cpu-type", machine->cpu_type,
&error_fatal);
- object_property_set_int(OBJECT(&s->cps), "num-vp", machine->smp.cpus,
+ object_property_set_uint(OBJECT(&s->cps), "num-vp", machine->smp.cpus,
&error_fatal);
qdev_connect_clock_in(DEVICE(&s->cps), "clk-in",
qdev_get_clock_out(dev, "cpu-refclk"));
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index 2b436700ce..38acc57468 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -114,9 +114,9 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
/* Inter-Thread Communication Unit */
if (itu_present) {
object_initialize_child(OBJECT(dev), "itu", &s->itu, TYPE_MIPS_ITU);
- object_property_set_int(OBJECT(&s->itu), "num-fifo", 16,
+ object_property_set_uint(OBJECT(&s->itu), "num-fifo", 16,
&error_abort);
- object_property_set_int(OBJECT(&s->itu), "num-semaphores", 16,
+ object_property_set_uint(OBJECT(&s->itu), "num-semaphores", 16,
&error_abort);
object_property_set_bool(OBJECT(&s->itu), "saar-present", saar_present,
&error_abort);
@@ -133,7 +133,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
/* Cluster Power Controller */
object_initialize_child(OBJECT(dev), "cpc", &s->cpc, TYPE_MIPS_CPC);
- object_property_set_int(OBJECT(&s->cpc), "num-vp", s->num_vp,
+ object_property_set_uint(OBJECT(&s->cpc), "num-vp", s->num_vp,
&error_abort);
object_property_set_int(OBJECT(&s->cpc), "vp-start-running", 1,
&error_abort);
@@ -146,9 +146,9 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
/* Global Interrupt Controller */
object_initialize_child(OBJECT(dev), "gic", &s->gic, TYPE_MIPS_GIC);
- object_property_set_int(OBJECT(&s->gic), "num-vp", s->num_vp,
+ object_property_set_uint(OBJECT(&s->gic), "num-vp", s->num_vp,
&error_abort);
- object_property_set_int(OBJECT(&s->gic), "num-irq", 128,
+ object_property_set_uint(OBJECT(&s->gic), "num-irq", 128,
&error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), errp)) {
return;
@@ -161,7 +161,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
gcr_base = env->CP0_CMGCRBase << 4;
object_initialize_child(OBJECT(dev), "gcr", &s->gcr, TYPE_MIPS_GCR);
- object_property_set_int(OBJECT(&s->gcr), "num-vp", s->num_vp,
+ object_property_set_uint(OBJECT(&s->gcr), "num-vp", s->num_vp,
&error_abort);
object_property_set_int(OBJECT(&s->gcr), "gcr-rev", 0x800,
&error_abort);
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index ec172b111a..af9021316d 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -1066,7 +1066,7 @@ static void create_cps(MachineState *ms, MaltaState *s,
object_initialize_child(OBJECT(s), "cps", &s->cps, TYPE_MIPS_CPS);
object_property_set_str(OBJECT(&s->cps), "cpu-type", ms->cpu_type,
&error_fatal);
- object_property_set_int(OBJECT(&s->cps), "num-vp", ms->smp.cpus,
+ object_property_set_uint(OBJECT(&s->cps), "num-vp", ms->smp.cpus,
&error_fatal);
qdev_connect_clock_in(DEVICE(&s->cps), "clk-in", s->cpuclk);
sysbus_realize(SYS_BUS_DEVICE(&s->cps), &error_fatal);
diff --git a/hw/misc/mips_cmgcr.c b/hw/misc/mips_cmgcr.c
index 3c8b37f700..66eb11662c 100644
--- a/hw/misc/mips_cmgcr.c
+++ b/hw/misc/mips_cmgcr.c
@@ -212,7 +212,7 @@ static const VMStateDescription vmstate_mips_gcr = {
};
static Property mips_gcr_properties[] = {
- DEFINE_PROP_INT32("num-vp", MIPSGCRState, num_vps, 1),
+ DEFINE_PROP_UINT32("num-vp", MIPSGCRState, num_vps, 1),
DEFINE_PROP_INT32("gcr-rev", MIPSGCRState, gcr_rev, 0x800),
DEFINE_PROP_UINT64("gcr-base", MIPSGCRState, gcr_base, GCR_BASE_ADDR),
DEFINE_PROP_LINK("gic", MIPSGCRState, gic_mr, TYPE_MEMORY_REGION,
diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c
index badef5c214..a06cdd10ea 100644
--- a/hw/misc/mips_itu.c
+++ b/hw/misc/mips_itu.c
@@ -549,9 +549,9 @@ static void mips_itu_reset(DeviceState *dev)
}
static Property mips_itu_properties[] = {
- DEFINE_PROP_INT32("num-fifo", MIPSITUState, num_fifo,
+ DEFINE_PROP_UINT32("num-fifo", MIPSITUState, num_fifo,
ITC_FIFO_NUM_MAX),
- DEFINE_PROP_INT32("num-semaphores", MIPSITUState, num_semaphores,
+ DEFINE_PROP_UINT32("num-semaphores", MIPSITUState, num_semaphores,
ITC_SEMAPH_NUM_MAX),
DEFINE_PROP_BOOL("saar-present", MIPSITUState, saar_present, false),
DEFINE_PROP_END_OF_LIST(),
diff --git a/include/hw/intc/mips_gic.h b/include/hw/intc/mips_gic.h
index eeb136e261..5e4c71edd4 100644
--- a/include/hw/intc/mips_gic.h
+++ b/include/hw/intc/mips_gic.h
@@ -211,8 +211,8 @@ struct MIPSGICState {
/* GIC VP Timer */
MIPSGICTimerState *gic_timer;
- int32_t num_vps;
- int32_t num_irq;
+ uint32_t num_vps;
+ uint32_t num_irq;
};
#endif /* MIPS_GIC_H */
diff --git a/include/hw/misc/mips_cmgcr.h b/include/hw/misc/mips_cmgcr.h
index 9fa58942d7..db4bf5f449 100644
--- a/include/hw/misc/mips_cmgcr.h
+++ b/include/hw/misc/mips_cmgcr.h
@@ -75,7 +75,7 @@ struct MIPSGCRState {
SysBusDevice parent_obj;
int32_t gcr_rev;
- int32_t num_vps;
+ uint32_t num_vps;
hwaddr gcr_base;
MemoryRegion iomem;
MemoryRegion *cpc_mr;
diff --git a/include/hw/misc/mips_itu.h b/include/hw/misc/mips_itu.h
index 50d961106d..ab6d286c38 100644
--- a/include/hw/misc/mips_itu.h
+++ b/include/hw/misc/mips_itu.h
@@ -57,8 +57,8 @@ struct MIPSITUState {
SysBusDevice parent_obj;
/*< public >*/
- int32_t num_fifo;
- int32_t num_semaphores;
+ uint32_t num_fifo;
+ uint32_t num_semaphores;
/* ITC Storage */
ITCStorageCell *cell;
--
2.38.1
next prev parent reply other threads:[~2023-02-03 14:59 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-03 14:55 [PATCH v2 00/15] hw: Use QOM alias properties and few QOM/QDev cleanups Philippe Mathieu-Daudé
2023-02-03 14:55 ` [PATCH v2 01/15] hw/pci/pcie_sriov: Replace fprintf(error_pretty) -> warn_reportf_err() Philippe Mathieu-Daudé
2023-09-25 10:24 ` Markus Armbruster
2023-02-03 14:55 ` [PATCH v2 02/15] hw/qdev: Introduce qdev_unrealize_and_unref() Philippe Mathieu-Daudé
2023-09-25 10:30 ` Markus Armbruster
2023-02-03 14:55 ` [PATCH v2 03/15] linux-user/syscall: Do not open-code qdev_unrealize_and_unref() Philippe Mathieu-Daudé
2023-09-25 10:30 ` Markus Armbruster
2023-02-03 14:55 ` [PATCH v2 04/15] hw/pci/pcie_sriov: " Philippe Mathieu-Daudé
2023-09-25 10:31 ` Markus Armbruster
2023-02-03 14:55 ` [PATCH v2 05/15] hw/i386/sgx: Do not open-code qdev_realize_and_unref() Philippe Mathieu-Daudé
2023-02-03 14:55 ` [PATCH v2 06/15] hw/ppc/sam460ex: Correctly set MAL properties Philippe Mathieu-Daudé
2023-02-03 14:55 ` [PATCH v2 07/15] hw/arm/nrf51: Alias 'flash-size' QOM property in SoC object Philippe Mathieu-Daudé
2023-02-03 14:55 ` [PATCH v2 08/15] hw/arm/fsl-imx: Alias 'phy-num' " Philippe Mathieu-Daudé
2023-02-03 14:55 ` [PATCH v2 09/15] hw/usb/hcd-ohci: Include missing 'sysbus.h' header Philippe Mathieu-Daudé
2023-09-25 10:35 ` Markus Armbruster
2023-02-03 14:55 ` [PATCH v2 10/15] hw/display/sm501: Embed OHCI QOM child in chipset Philippe Mathieu-Daudé
2023-02-03 16:16 ` BALATON Zoltan
2023-09-25 10:37 ` Markus Armbruster
2023-02-03 14:55 ` [PATCH v2 11/15] hw/display/sm501: Alias 'dma-offset' QOM property in chipset object Philippe Mathieu-Daudé
2023-02-03 16:19 ` BALATON Zoltan
2023-09-25 10:37 ` Markus Armbruster
2023-02-03 14:55 ` [PATCH v2 12/15] hw/display/sm501: Unify common QOM properties Philippe Mathieu-Daudé
2023-02-03 16:20 ` BALATON Zoltan
2023-02-27 13:36 ` Philippe Mathieu-Daudé
2023-02-27 17:01 ` BALATON Zoltan
2023-09-25 10:38 ` Markus Armbruster
2023-02-03 14:55 ` [PATCH v2 13/15] hw/qdev: Remove DEFINE_PROP_DMAADDR() and 'hw/qdev-dma.h' Philippe Mathieu-Daudé
2023-09-25 10:48 ` Markus Armbruster
2023-09-25 11:03 ` Markus Armbruster
2023-09-25 16:41 ` Paolo Bonzini
2023-09-26 6:51 ` Markus Armbruster
2023-02-03 14:55 ` Philippe Mathieu-Daudé [this message]
2023-02-03 14:55 ` [RFC PATCH v2 15/15] hw/mips/itu: Pass SAAR using QOM link property Philippe Mathieu-Daudé
2023-09-19 12:35 ` [PATCH v2 00/15] hw: Use QOM alias properties and few QOM/QDev cleanups Philippe Mathieu-Daudé
2023-09-25 11:05 ` Markus Armbruster
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