From: Biju Das <biju.das.jz@bp.renesas.com>
To: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Vinod Koul <vkoul@kernel.org>,
Magnus Damm <magnus.damm@gmail.com>,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH 2/2] arm64: dts: renesas: Add clock-names and reset-names to DMAC node
Date: Wed, 15 Mar 2023 06:47:26 +0000 [thread overview]
Message-ID: <20230315064726.22739-2-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20230315064726.22739-1-biju.das.jz@bp.renesas.com>
Add clock-names and reset-names to RZ/G2{L,LC,UL}, RZ/V2L and
RZ/Five DMAC nodes.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 2 ++
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 2 ++
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 2 ++
3 files changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index a9700654b421..27c35a657b15 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -564,9 +564,11 @@ dmac: dma-controller@11820000 {
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD R9A07G043_DMAC_ACLK>,
<&cpg CPG_MOD R9A07G043_DMAC_PCLK>;
+ clock-names = "main", "register";
power-domains = <&cpg>;
resets = <&cpg R9A07G043_DMAC_ARESETN>,
<&cpg R9A07G043_DMAC_RST_ASYNC>;
+ reset-names = "arst", "rst_async";
#dma-cells = <1>;
dma-channels = <16>;
};
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 79cffbf20c55..7b68bbebb5bd 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -740,9 +740,11 @@ dmac: dma-controller@11820000 {
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD R9A07G044_DMAC_ACLK>,
<&cpg CPG_MOD R9A07G044_DMAC_PCLK>;
+ clock-names = "main", "register";
power-domains = <&cpg>;
resets = <&cpg R9A07G044_DMAC_ARESETN>,
<&cpg R9A07G044_DMAC_RST_ASYNC>;
+ reset-names = "arst", "rst_async";
#dma-cells = <1>;
dma-channels = <16>;
};
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index c0ae9c7c10fc..cc11e5855d62 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -746,9 +746,11 @@ dmac: dma-controller@11820000 {
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD R9A07G054_DMAC_ACLK>,
<&cpg CPG_MOD R9A07G054_DMAC_PCLK>;
+ clock-names = "main", "register";
power-domains = <&cpg>;
resets = <&cpg R9A07G054_DMAC_ARESETN>,
<&cpg R9A07G054_DMAC_RST_ASYNC>;
+ reset-names = "arst", "rst_async";
#dma-cells = <1>;
dma-channels = <16>;
};
--
2.25.1
next prev parent reply other threads:[~2023-03-15 6:58 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-15 6:47 [PATCH 1/2] dt-bindings: dma: rz-dmac: Document clock-names and reset-names Biju Das
2023-03-15 6:47 ` Biju Das [this message]
2023-03-30 9:10 ` [PATCH 2/2] arm64: dts: renesas: Add clock-names and reset-names to DMAC node Geert Uytterhoeven
2023-03-15 7:53 ` [PATCH 1/2] dt-bindings: dma: rz-dmac: Document clock-names and reset-names Krzysztof Kozlowski
2023-03-17 17:27 ` Vinod Koul
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