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From: Pierre Gondois <pierre.gondois@arm.com>
To: linux-kernel@vger.kernel.org
Cc: Radu Rendec <rrendec@redhat.com>,
	Alexandre Ghiti <alexghiti@rivosinc.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Will Deacon <will@kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Pierre Gondois <pierre.gondois@arm.com>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Palmer Dabbelt <palmer@rivosinc.com>,
	Gavin Shan <gshan@redhat.com>,
	Jeremy Linton <jeremy.linton@arm.com>
Subject: [PATCH v4 1/4] cacheinfo: Check sib_leaf in cache_leaves_are_shared()
Date: Fri, 14 Apr 2023 10:14:49 +0200	[thread overview]
Message-ID: <20230414081453.244787-2-pierre.gondois@arm.com> (raw)
In-Reply-To: <20230414081453.244787-1-pierre.gondois@arm.com>

If there is no ACPI/DT information, it is assumed that L1 caches
are private and L2 (and higher) caches are shared. A cache is
'shared' between two CPUs if it is accessible from these two
CPUs.

Each CPU owns a representation (i.e. has a dedicated cacheinfo struct)
of the caches it has access to. cache_leaves_are_shared() tries to
identify whether two representations are designating the same actual
cache.

In cache_leaves_are_shared(), if 'this_leaf' is a L2 cache (or higher)
and 'sib_leaf' is a L1 cache, the caches are detected as shared as
only this_leaf's cache level is checked.
This is leads to setting sib_leaf as being shared with another CPU,
which is incorrect as this is a L1 cache.

Check 'sib_leaf->level'. Also update the comment as the function is
called when populating 'shared_cpu_map'.

Fixes: f16d1becf96f ("cacheinfo: Use cache identifiers to check if the caches are shared if available")
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/base/cacheinfo.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index f3903d002819..c5d2293ac2a6 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -38,11 +38,10 @@ static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
 {
 	/*
 	 * For non DT/ACPI systems, assume unique level 1 caches,
-	 * system-wide shared caches for all other levels. This will be used
-	 * only if arch specific code has not populated shared_cpu_map
+	 * system-wide shared caches for all other levels.
 	 */
 	if (!(IS_ENABLED(CONFIG_OF) || IS_ENABLED(CONFIG_ACPI)))
-		return !(this_leaf->level == 1);
+		return (this_leaf->level != 1) && (sib_leaf->level != 1);
 
 	if ((sib_leaf->attributes & CACHE_ID) &&
 	    (this_leaf->attributes & CACHE_ID))
-- 
2.25.1


  reply	other threads:[~2023-04-14  8:15 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-14  8:14 [PATCH v4 0/4] cacheinfo: Correctly fallback to using clidr_el1's information Pierre Gondois
2023-04-14  8:14 ` Pierre Gondois [this message]
2023-04-14  8:14 ` [PATCH v4 2/4] cacheinfo: Check cache properties are present in DT Pierre Gondois
2023-04-14  8:14 ` [PATCH v4 3/4] arch_topology: Remove early cacheinfo error message if -ENOENT Pierre Gondois
2023-04-14  8:14 ` [PATCH v4 4/4] cacheinfo: Add use_arch[|_cache]_info field/function Pierre Gondois
2023-04-14 22:36 ` [PATCH v4 0/4] cacheinfo: Correctly fallback to using clidr_el1's information Florian Fainelli
2023-04-17 14:07 ` Sudeep Holla

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