From: Jonathan Cavitt <jonathan.cavitt@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: andi.shyti@intel.com, chris.p.wilson@linux.intel.com,
tomasz.mistat@intel.com, jonathan.cavitt@intel.com,
rodrigo.vivi@intel.com, gregory.f.germano@intel.com,
matthew.d.roper@intel.com, nirmoy.das@intel.com
Subject: [Intel-gfx] [PATCH v9 0/3] Apply Wa_16018031267 / Wa_16018063123
Date: Tue, 12 Sep 2023 07:19:28 -0700 [thread overview]
Message-ID: <20230912141931.1803917-1-jonathan.cavitt@intel.com> (raw)
Apply Wa_16018031267 / Wa_16018063123. This necessitates submitting a
fastcolor blit as WABB and setting the copy engine arbitration to
round-robin mode.
v2:
- Rename old platform check in second patch to match
declaration in first patch.
- Refactor second patch name to match first patch.
v3:
- Move NEEDS_FASTCOLOR_BLT_WABB to intel_gt.h.
- Refactor NEEDS_FASTCOLOR_BLT_WABB to make it more
streamlined to use.
- Stop dividing PAGE_SIZE by sizeof(u32) when computing
ctx_bb_ggtt_addr for lrc_setup_bb_per_ctx.
- Reduce comment complexity.
- Fix several checkpatch warnings.
v4:
- Actually stop dividing PAGE_SIZE by sizeof(u32) when
computing ctx_bb_ggtt_addr for lrc_setup_bb_per_ctx.
v5:
- Stop dividing PAGE_SIZE by sizeof(u32) in
check_ring_start during lrc live selftest.
v6:
- Append MI_BATCH_BUFFER_END to end of all PER_CTX_BB
command streams.
- No longer skip on empty, as command stream will never
be empty (always contains at least MI_BATCH_BUFFER_END).
- No longer append MI_NOOP until cachline aligned (was a
fragment from INDIRECT_CTX setup).
v7:
- Use 0x6b instead of 0 for color to maintain functionality.
v8:
- Revert v7.
- Add some reserved kernel space per vm to run the
workaround on.
v9:
- Hide reserved kernel space per vm from userspace.
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
CC: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
CC: Rodrigo Vivi <rodrigo.vivi@intel.com>
CC: Tomasz Mistat <tomasz.mistat@intel.com>
CC: Gregory F Germano <gregory.f.germano@intel.com>
CC: Matt Roper <matthew.d.roper@intel.com>
CC: James Ausmus <james.ausmus@intel.com>
CC: Chris Wilson <chris.p.wilson@linux.intel.com>
CC: Andi Shyti <andi.shyti@intel.com>
Jonathan Cavitt (3):
drm/i915: Reserve some kernel space per vm
drm/i915: Add WABB blit for Wa_16018031267 / Wa_16018063123
drm/i915: Set copy engine arbitration for Wa_16018031267 /
Wa_16018063123
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 7 ++
drivers/gpu/drm/i915/gt/intel_engine_regs.h | 6 ++
drivers/gpu/drm/i915/gt/intel_gt.h | 4 +
drivers/gpu/drm/i915/gt/intel_gt_types.h | 2 +
drivers/gpu/drm/i915/gt/intel_gtt.h | 1 +
drivers/gpu/drm/i915/gt/intel_lrc.c | 101 +++++++++++++++++++-
drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +
drivers/gpu/drm/i915/gt/selftest_lrc.c | 65 +++++++++----
8 files changed, 170 insertions(+), 21 deletions(-)
--
2.25.1
next reply other threads:[~2023-09-12 14:30 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-12 14:19 Jonathan Cavitt [this message]
2023-09-12 14:19 ` [Intel-gfx] [PATCH v9 1/3] drm/i915: Reserve some kernel space per vm Jonathan Cavitt
2023-09-12 14:19 ` [Intel-gfx] [PATCH v9 2/3] drm/i915: Add WABB blit for Wa_16018031267 / Wa_16018063123 Jonathan Cavitt
2023-09-12 14:19 ` [Intel-gfx] [PATCH v9 3/3] drm/i915: Set copy engine arbitration " Jonathan Cavitt
2023-09-12 20:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Apply " Patchwork
2023-09-12 20:21 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-12 20:40 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-09-13 21:19 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Apply Wa_16018031267 / Wa_16018063123 (rev2) Patchwork
2023-09-13 21:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-13 21:37 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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