[PATCH 2/3] MIPS: Clear Cause.BD in instruction_pointer_set

From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: Oleg Nesterov <oleg@redhat.com>,
	 Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	 Andrew Morton <akpm@linux-foundation.org>,
	 Ben Hutchings <ben@decadent.org.uk>
Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
	 linux-mips@vger.kernel.org, linux-mm@kvack.org,
	 Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: [PATCH 2/3] MIPS: Clear Cause.BD in instruction_pointer_set
Date: Thu, 01 Feb 2024 15:46:28 +0000	[thread overview]
Message-ID: <20240201-exception_ip-v1-2-aa26ab3ee0b5@flygoat.com> (raw)
In-Reply-To: <20240201-exception_ip-v1-0-aa26ab3ee0b5@flygoat.com>

Clear Cause.BD after we use instruction_pointer_set to override
EPC.

This can prevent exception_epc check against instruction code at
new return address.
It won't be considered as "in delay slot" after epc being overridden
anyway.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/mips/include/asm/ptrace.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index 97589731fd40..845508008e90 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -60,6 +60,7 @@ static inline void instruction_pointer_set(struct pt_regs *regs,
                                            unsigned long val)
 {
 	regs->cp0_epc = val;
+	regs->cp0_cause &= ~CAUSEF_BD;
 }
 
 /* Query offset/name of register from its name/offset */

-- 
2.43.0

