[PATCH v5 02/19] drm/msm/dpu: add division of drm_display_mode's hskew parameter

From: Paloma Arellano <quic_parellan@quicinc.com>
To: <freedreno@lists.freedesktop.org>
Cc: Paloma Arellano <quic_parellan@quicinc.com>,
	<linux-arm-msm@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>, <robdclark@gmail.com>,
	<seanpaul@chromium.org>, <swboyd@chromium.org>,
	<dmitry.baryshkov@linaro.org>, <quic_abhinavk@quicinc.com>,
	<quic_jesszhan@quicinc.com>, <quic_khsieh@quicinc.com>,
	<marijn.suijten@somainline.org>, <neil.armstrong@linaro.org>
Subject: [PATCH v5 02/19] drm/msm/dpu: add division of drm_display_mode's hskew parameter
Date: Thu, 22 Feb 2024 11:39:47 -0800	[thread overview]
Message-ID: <20240222194025.25329-3-quic_parellan@quicinc.com> (raw)
In-Reply-To: <20240222194025.25329-1-quic_parellan@quicinc.com>

Setting up the timing engine when the physical encoder has a split role
neglects dividing the drm_display_mode's hskew parameter. Let's fix this
since this must also be done in preparation for implementing YUV420 over
DP.

Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Paloma Arellano <quic_parellan@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index f562beb6f7971..f02411b062c4c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -260,12 +260,14 @@ static void dpu_encoder_phys_vid_setup_timing_engine(
 		mode.htotal >>= 1;
 		mode.hsync_start >>= 1;
 		mode.hsync_end >>= 1;
+		mode.hskew >>= 1;
 
 		DPU_DEBUG_VIDENC(phys_enc,
-			"split_role %d, halve horizontal %d %d %d %d\n",
+			"split_role %d, halve horizontal %d %d %d %d %d\n",
 			phys_enc->split_role,
 			mode.hdisplay, mode.htotal,
-			mode.hsync_start, mode.hsync_end);
+			mode.hsync_start, mode.hsync_end,
+			mode.hskew);
 	}
 
 	drm_mode_to_intf_timing_params(phys_enc, &mode, &timing_params);
-- 
2.39.2

