From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 00/14] target-arm queue
Date: Fri, 8 Mar 2024 15:50:01 +0000 [thread overview]
Message-ID: <20240308155015.3637663-1-peter.maydell@linaro.org> (raw)
The following changes since commit 8f6330a807f2642dc2a3cdf33347aa28a4c00a87:
Merge tag 'pull-maintainer-updates-060324-1' of https://gitlab.com/stsquad/qemu into staging (2024-03-06 16:56:20 +0000)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240308
for you to fetch changes up to bbf6c6dbead82292a20951eb1204442a6b838de9:
target/arm: Move v7m-related code from cpu32.c into a separate file (2024-03-08 14:45:03 +0000)
----------------------------------------------------------------
target-arm queue:
* Implement FEAT_ECV
* STM32L4x5: Implement GPIO device
* Fix 32-bit SMOPA
* Refactor v7m related code from cpu32.c into its own file
* hw/rtc/sun4v-rtc: Relicense to GPLv2-or-later
----------------------------------------------------------------
Inès Varhol (3):
hw/gpio: Implement STM32L4x5 GPIO
hw/arm: Connect STM32L4x5 GPIO to STM32L4x5 SoC
tests/qtest: Add STM32L4x5 GPIO QTest testcase
Peter Maydell (9):
target/arm: Move some register related defines to internals.h
target/arm: Timer _EL02 registers UNDEF for E2H == 0
target/arm: use FIELD macro for CNTHCTL bit definitions
target/arm: Don't allow RES0 CNTHCTL_EL2 bits to be written
target/arm: Implement new FEAT_ECV trap bits
target/arm: Define CNTPCTSS_EL0 and CNTVCTSS_EL0
target/arm: Implement FEAT_ECV CNTPOFF_EL2 handling
target/arm: Enable FEAT_ECV for 'max' CPU
hw/rtc/sun4v-rtc: Relicense to GPLv2-or-later
Richard Henderson (1):
target/arm: Fix 32-bit SMOPA
Thomas Huth (1):
target/arm: Move v7m-related code from cpu32.c into a separate file
MAINTAINERS | 1 +
docs/system/arm/b-l475e-iot01a.rst | 2 +-
docs/system/arm/emulation.rst | 1 +
include/hw/arm/stm32l4x5_soc.h | 2 +
include/hw/gpio/stm32l4x5_gpio.h | 71 +++++
include/hw/misc/stm32l4x5_syscfg.h | 3 +-
include/hw/rtc/sun4v-rtc.h | 2 +-
target/arm/cpu-features.h | 10 +
target/arm/cpu.h | 129 +--------
target/arm/internals.h | 151 ++++++++++
hw/arm/stm32l4x5_soc.c | 71 ++++-
hw/gpio/stm32l4x5_gpio.c | 477 ++++++++++++++++++++++++++++++++
hw/misc/stm32l4x5_syscfg.c | 1 +
hw/rtc/sun4v-rtc.c | 2 +-
target/arm/helper.c | 189 ++++++++++++-
target/arm/tcg/cpu-v7m.c | 290 +++++++++++++++++++
target/arm/tcg/cpu32.c | 261 ------------------
target/arm/tcg/cpu64.c | 1 +
target/arm/tcg/sme_helper.c | 77 +++---
tests/qtest/stm32l4x5_gpio-test.c | 551 +++++++++++++++++++++++++++++++++++++
tests/tcg/aarch64/sme-smopa-1.c | 47 ++++
tests/tcg/aarch64/sme-smopa-2.c | 54 ++++
hw/arm/Kconfig | 3 +-
hw/gpio/Kconfig | 3 +
hw/gpio/meson.build | 1 +
hw/gpio/trace-events | 6 +
target/arm/meson.build | 3 +
target/arm/tcg/meson.build | 3 +
target/arm/trace-events | 1 +
tests/qtest/meson.build | 3 +-
tests/tcg/aarch64/Makefile.target | 2 +-
31 files changed, 1962 insertions(+), 456 deletions(-)
create mode 100644 include/hw/gpio/stm32l4x5_gpio.h
create mode 100644 hw/gpio/stm32l4x5_gpio.c
create mode 100644 target/arm/tcg/cpu-v7m.c
create mode 100644 tests/qtest/stm32l4x5_gpio-test.c
create mode 100644 tests/tcg/aarch64/sme-smopa-1.c
create mode 100644 tests/tcg/aarch64/sme-smopa-2.c
next reply other threads:[~2024-03-08 15:52 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-08 15:50 Peter Maydell [this message]
2024-03-08 15:50 ` [PULL 01/14] target/arm: Move some register related defines to internals.h Peter Maydell
2024-03-08 15:50 ` [PULL 02/14] target/arm: Timer _EL02 registers UNDEF for E2H == 0 Peter Maydell
2024-03-08 15:50 ` [PULL 03/14] target/arm: use FIELD macro for CNTHCTL bit definitions Peter Maydell
2024-03-08 15:50 ` [PULL 04/14] target/arm: Don't allow RES0 CNTHCTL_EL2 bits to be written Peter Maydell
2024-03-08 15:50 ` [PULL 05/14] target/arm: Implement new FEAT_ECV trap bits Peter Maydell
2024-03-08 15:50 ` [PULL 06/14] target/arm: Define CNTPCTSS_EL0 and CNTVCTSS_EL0 Peter Maydell
2024-03-08 15:50 ` [PULL 07/14] target/arm: Implement FEAT_ECV CNTPOFF_EL2 handling Peter Maydell
2024-03-08 15:50 ` [PULL 08/14] target/arm: Enable FEAT_ECV for 'max' CPU Peter Maydell
2024-03-08 15:50 ` [PULL 09/14] hw/gpio: Implement STM32L4x5 GPIO Peter Maydell
2024-03-08 15:50 ` [PULL 10/14] hw/arm: Connect STM32L4x5 GPIO to STM32L4x5 SoC Peter Maydell
2024-03-08 15:50 ` [PULL 11/14] tests/qtest: Add STM32L4x5 GPIO QTest testcase Peter Maydell
2024-03-08 15:50 ` [PULL 12/14] target/arm: Fix 32-bit SMOPA Peter Maydell
2024-03-08 15:50 ` [PULL 13/14] hw/rtc/sun4v-rtc: Relicense to GPLv2-or-later Peter Maydell
2024-03-08 15:50 ` [PULL 14/14] target/arm: Move v7m-related code from cpu32.c into a separate file Peter Maydell
2024-03-09 14:58 ` [PULL 00/14] target-arm queue Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2021-07-27 10:47 Peter Maydell
2021-07-27 17:05 ` Peter Maydell
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