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From: Niklas Cassel <cassel@kernel.org>
To: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>
Cc: Shradha Todi <shradha.t@samsung.com>,
	Damien Le Moal <dlemoal@kernel.org>,
	Niklas Cassel <cassel@kernel.org>,
	linux-pci@vger.kernel.org
Subject: [PATCH v2 7/9] PCI: cadence: Set a 64-bit BAR if requested
Date: Tue, 12 Mar 2024 11:51:47 +0100	[thread overview]
Message-ID: <20240312105152.3457899-8-cassel@kernel.org> (raw)
In-Reply-To: <20240312105152.3457899-1-cassel@kernel.org>

Ever since commit f25b5fae29d4 ("PCI: endpoint: Setting a BAR size > 4 GB
is invalid if 64-bit flag is not set") it has been impossible to get the
.set_bar() callback with a BAR size > 4 GB, if the BAR was also not
requested to be configured as a 64-bit BAR.

Thus, forcing setting the 64-bit flag for BARs larger than 4 GB in the
lower level driver is dead code and can be removed.

It is however possible that an EPF driver configures a BAR as 64-bit,
even if the requested size is < 4 GB.

Respect the requested BAR configuration, just like how it is already
repected with regards to the prefetchable bit.

Signed-off-by: Niklas Cassel <cassel@kernel.org>
---
 drivers/pci/controller/cadence/pcie-cadence-ep.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/pci/controller/cadence/pcie-cadence-ep.c b/drivers/pci/controller/cadence/pcie-cadence-ep.c
index 2d0a8d78bffb..de10e5edd1b0 100644
--- a/drivers/pci/controller/cadence/pcie-cadence-ep.c
+++ b/drivers/pci/controller/cadence/pcie-cadence-ep.c
@@ -99,14 +99,11 @@ static int cdns_pcie_ep_set_bar(struct pci_epc *epc, u8 fn, u8 vfn,
 		ctrl = CDNS_PCIE_LM_BAR_CFG_CTRL_IO_32BITS;
 	} else {
 		bool is_prefetch = !!(flags & PCI_BASE_ADDRESS_MEM_PREFETCH);
-		bool is_64bits = sz > SZ_2G;
+		bool is_64bits = !!(flags & PCI_BASE_ADDRESS_MEM_TYPE_64);
 
 		if (is_64bits && (bar & 1))
 			return -EINVAL;
 
-		if (is_64bits && !(flags & PCI_BASE_ADDRESS_MEM_TYPE_64))
-			epf_bar->flags |= PCI_BASE_ADDRESS_MEM_TYPE_64;
-
 		if (is_64bits && is_prefetch)
 			ctrl = CDNS_PCIE_LM_BAR_CFG_CTRL_PREFETCH_MEM_64BITS;
 		else if (is_prefetch)
-- 
2.44.0


  parent reply	other threads:[~2024-03-12 10:52 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-12 10:51 [PATCH v2 0/9] PCI: endpoint: set prefetchable bit for 64-bit BARs Niklas Cassel
2024-03-12 10:51 ` Niklas Cassel
2024-03-12 10:51 ` Niklas Cassel
2024-03-12 10:51 ` [PATCH v2 1/9] PCI: endpoint: pci-epf-test: Fix incorrect loop increment Niklas Cassel
2024-03-12 10:51 ` [PATCH v2 2/9] PCI: endpoint: Allocate a 64-bit BAR if that is the only option Niklas Cassel
2024-03-12 10:51 ` [PATCH v2 3/9] PCI: endpoint: pci-epf-test: Remove superfluous code Niklas Cassel
2024-03-12 10:51 ` [PATCH v2 4/9] PCI: endpoint: pci-epf-test: Simplify pci_epf_test_alloc_space() loop Niklas Cassel
2024-03-12 10:51 ` [PATCH v2 5/9] PCI: endpoint: pci-epf-test: Simplify pci_epf_test_set_bar() loop Niklas Cassel
2024-03-13  2:11   ` kernel test robot
2024-03-12 10:51 ` [PATCH v2 6/9] PCI: endpoint: pci-epf-test: Clean up pci_epf_test_unbind() Niklas Cassel
2024-03-12 10:51 ` Niklas Cassel [this message]
2024-05-16 20:49   ` [PATCH v2 7/9] PCI: cadence: Set a 64-bit BAR if requested Bjorn Helgaas
2024-05-21 12:01     ` Niklas Cassel
2024-03-12 10:51 ` [PATCH v2 8/9] PCI: rockchip-ep: " Niklas Cassel
2024-03-12 10:51   ` Niklas Cassel
2024-03-12 10:51   ` Niklas Cassel
2024-03-12 10:51 ` [PATCH v2 9/9] PCI: endpoint: Set prefetch when allocating memory for 64-bit BARs Niklas Cassel

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