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From: Simone Ballarin <simone.ballarin@bugseng.com>
To: Jan Beulich <jbeulich@suse.com>,
	Stefano Stabellini <sstabellini@kernel.org>
Cc: xen-devel@lists.xenproject.org, consulting@bugseng.com,
	George Dunlap <george.dunlap@citrix.com>,
	Dario Faggioli <dfaggioli@suse.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Julien Grall <julien@xen.org>, Wei Liu <wl@xen.org>
Subject: Re: [XEN PATCH 4/4] xen: address violations of MISRA C:2012 Rule 13.1
Date: Thu, 19 Oct 2023 13:12:30 +0200	[thread overview]
Message-ID: <27fcfc87-aa8f-4bfb-863a-91a75c763050@bugseng.com> (raw)
In-Reply-To: <78a7b73a-fefb-6884-90c5-abad2860a521@suse.com>

On 19/10/23 11:35, Jan Beulich wrote:
> On 19.10.2023 03:06, Stefano Stabellini wrote:
>> On Wed, 18 Oct 2023, Simone Ballarin wrote:
>>> --- a/xen/common/sched/core.c
>>> +++ b/xen/common/sched/core.c
>>> @@ -1504,6 +1504,8 @@ long vcpu_yield(void)
>>>   {
>>>       struct vcpu * v=current;
>>>       spinlock_t *lock;
>>> +    domid_t domain_id;
>>> +    int vcpu_id;
>>>   
>>>       rcu_read_lock(&sched_res_rculock);
>>>   
>>> @@ -1515,7 +1517,9 @@ long vcpu_yield(void)
>>>   
>>>       SCHED_STAT_CRANK(vcpu_yield);
>>>   
>>> -    TRACE_2D(TRC_SCHED_YIELD, current->domain->domain_id, current->vcpu_id);
>>> +    domain_id = current->domain->domain_id;
>>> +    vcpu_id = current->vcpu_id;
>>> +    TRACE_2D(TRC_SCHED_YIELD, domain_id, vcpu_id);
>>
>> Also here it looks like accessing the current pointer is considered a
>> side effect. Why? This is a just a global variable that is only accessed
>> for reading.
> 
> Not exactly. It's a per-CPU variable access on Arm, but involves a
> function call on x86. Still that function call has no other side
> effects, but I guess Misra wouldn't honor this.
> 
> I'm afraid though that the suggested change violates rule 2.2, as
> the two new assignments are dead code when !CONFIG_TRACEBUFFER.
> 
> Jan

I confirm that there is no problem in X86: I will simply propose a patch
adding __attribute_pure__ to get_cpu_info.

-- 
Simone Ballarin, M.Sc.

Field Application Engineer, BUGSENG (https://bugseng.com)



  reply	other threads:[~2023-10-19 11:12 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-18 14:18 [XEN PATCH 0/4][for-4.19] xen: address violations of Rule 13.1 Simone Ballarin
2023-10-18 14:18 ` [XEN PATCH 1/4] xen/arm: address violations of MISRA C:2012 " Simone Ballarin
2023-10-18 15:03   ` Julien Grall
2023-10-19  1:01     ` Stefano Stabellini
2023-10-19  7:34     ` Simone Ballarin
2023-10-19  8:19       ` Julien Grall
2023-10-19  8:43         ` Simone Ballarin
2023-10-19 10:11           ` Julien Grall
2023-10-19 11:10             ` Simone Ballarin
2023-10-19 12:30               ` Julien Grall
2023-10-19 13:24                 ` Simone Ballarin
2023-10-19 18:30                   ` Stefano Stabellini
2023-10-20  8:28                     ` Julien Grall
2023-10-23 15:10                       ` Simone Ballarin
2023-10-18 14:18 ` [XEN PATCH 2/4] automation/eclair: add deviations and call properties Simone Ballarin
2023-10-19  0:57   ` Stefano Stabellini
2023-10-19  7:44     ` Simone Ballarin
2023-10-19  8:26       ` Julien Grall
2023-10-19  9:04         ` Simone Ballarin
2023-10-18 14:18 ` [XEN PATCH 3/4] xen/include: add pure and const attributes Simone Ballarin
2023-10-19  1:02   ` Stefano Stabellini
2023-10-19  9:07     ` Simone Ballarin
2023-10-23 13:34   ` Jan Beulich
2023-10-23 13:51     ` Andrew Cooper
2023-10-23 14:09       ` Jan Beulich
2023-10-23 15:23     ` Simone Ballarin
2023-10-23 15:33       ` Jan Beulich
2023-10-23 22:05         ` Stefano Stabellini
2023-10-23 22:12           ` Stefano Stabellini
2023-10-24  6:24           ` Jan Beulich
2024-02-23  1:32             ` Stefano Stabellini
2024-02-23  7:36               ` Jan Beulich
2024-02-23 22:36                 ` Stefano Stabellini
2024-02-26  7:33                   ` Jan Beulich
2024-02-26 23:48                     ` Stefano Stabellini
2024-02-27  7:23                       ` Jan Beulich
2024-02-28  2:14                         ` Stefano Stabellini
2023-10-18 14:18 ` [XEN PATCH 4/4] xen: address violations of MISRA C:2012 Rule 13.1 Simone Ballarin
2023-10-19  1:06   ` Stefano Stabellini
2023-10-19  9:18     ` Simone Ballarin
2023-10-19 18:35       ` Stefano Stabellini
2023-10-19  9:35     ` Jan Beulich
2023-10-19 11:12       ` Simone Ballarin [this message]
2023-10-19 11:19         ` Jan Beulich
2023-10-19 13:36           ` Simone Ballarin
2023-10-19 18:35             ` Stefano Stabellini
2023-10-23 14:03   ` Jan Beulich

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