Re: [PATCH 05/28] ARM: GICv3 ITS: map ITS command buffer

From: Julien Grall <julien.grall@arm.com>
To: Stefano Stabellini <sstabellini@kernel.org>,
	Andre Przywara <andre.przywara@arm.com>
Cc: xen-devel@lists.xenproject.org, Vijay Kilari <vijay.kilari@gmail.com>
Subject: Re: [PATCH 05/28] ARM: GICv3 ITS: map ITS command buffer
Date: Tue, 14 Feb 2017 20:50:58 +0000	[thread overview]
Message-ID: <34b01cc4-efda-3641-1ec5-9d57fe30c205@arm.com> (raw)
In-Reply-To: <alpine.DEB.2.10.1702131659180.6418@sstabellini-ThinkPad-X260>

Hi Stefano,

On 02/14/2017 12:59 AM, Stefano Stabellini wrote:
> On Mon, 30 Jan 2017, Andre Przywara wrote:
>>  static int its_map_baser(void __iomem *basereg, uint64_t regc, int nr_items)
>> @@ -150,6 +191,11 @@ int gicv3_its_init(struct host_its *hw_its)
>>          }
>>      }
>>
>> +    hw_its->cmd_buf = its_map_cbaser(hw_its);
>> +    if ( !hw_its->cmd_buf )
>> +        return -ENOMEM;
>> +    writeq_relaxed(0, hw_its->its_base + GITS_CWRITER);
>
> Why this new write?

This was requested by me. From the spec (8.19.5 in ARM IHI 0069C), the
reset value of GITS_CWRITER is unknown. So we have to reset the register
to 0 otherwise the ITS may try to read invalid command as soon as it has
been enabled.

FWIW, GITS_CREADR was reset to 0 by the ITS when GITS_CBASER has
successfully been written (see 8.19.2).

Cheers,

--
Julien Grall
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