All of lore.kernel.org
 help / color / mirror / Atom feed
From: Shaokun Zhang <zhangshaokun@hisilicon.com>
To: Marc Zyngier <maz@kernel.org>
Cc: <linux-kernel@vger.kernel.org>,
	Wudi Wang <wangwudi@hisilicon.com>,
	Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [PATCH] irqchip/irq-gic-v3-its.c: Return its_invall_cmd.col when building INVALL
Date: Thu, 9 Dec 2021 09:17:25 +0800	[thread overview]
Message-ID: <3cc66fc7-7091-37e6-350b-f9a223392804@hisilicon.com> (raw)
In-Reply-To: <522e91148810ca7c77ad492d3a92c7a9@kernel.org>

Hi Marc,

On 2021/12/8 16:25, Marc Zyngier wrote:
> On 2021-12-08 01:54, Shaokun Zhang wrote:
>> From: Wudi Wang <wangwudi@hisilicon.com>
>>
>> INVALL CMD specifies that the ITS must ensure any caching associated with
>> the interrupt collection defined by ICID is consistent with the LPI
>> configuration tables held in memory for all Redistributors. SYNC is
>> required to ensure that INVALL is executed.
> 
> The patch title doesn't quite spell out the issue. It should say something
> like:
> 
> "Force synchronisation when issuing INVALL">

Make sense.

>>
>> Currently, LPI configuration data may be inconsistent with that in the
>> memory within a short period of time after the INVALL command is executed.
> 
> I'm curious: have you seen any issue with this on actual HW? In my
> experience, all implementations treat INVALL as a synchronous command,
> 
> Or was this solely done via inspection?
> 

It is noticed by checking the implementation of INVALL API function, not
by on actual HW.

>>
>> Cc: Thomas Gleixner <tglx@linutronix.de>
>> Cc: Marc Zyngier <maz@kernel.org>
>> Signed-off-by: Wudi Wang <wangwudi@hisilicon.com>
>> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
> 
> This needs:
> 
> Fixes: cc2d3216f53 ("irqchip: GICv3: ITS command queue")
> 

Oops, indeed, apologies that forget to add this tag.

>> ---
>>  drivers/irqchip/irq-gic-v3-its.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
>> index eb0882d15366..0cb584d9815b 100644
>> --- a/drivers/irqchip/irq-gic-v3-its.c
>> +++ b/drivers/irqchip/irq-gic-v3-its.c
>> @@ -742,7 +742,7 @@ static struct its_collection
>> *its_build_invall_cmd(struct its_node *its,
>>
>>      its_fixup_cmd(cmd);
>>
>> -    return NULL;
>> +    return desc->its_invall_cmd.col;
>>  }
>>
>>  static struct its_vpe *its_build_vinvall_cmd(struct its_node *its,
> 
> I'll fix the above locally, no need to resend.
> 

Thanks Marc's help.

> Thanks,
> 
>         M.

  reply	other threads:[~2021-12-09  1:17 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-08  1:54 [PATCH] irqchip/irq-gic-v3-its.c: Return its_invall_cmd.col when building INVALL Shaokun Zhang
2021-12-08  8:25 ` Marc Zyngier
2021-12-09  1:17   ` Shaokun Zhang [this message]
2021-12-08  8:38 ` [irqchip: irq/irqchip-fixes] irqchip/irq-gic-v3-its.c: Force synchronisation when issuing INVALL irqchip-bot for Wudi Wang
2021-12-08 11:17 ` irqchip-bot for Wudi Wang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3cc66fc7-7091-37e6-350b-f9a223392804@hisilicon.com \
    --to=zhangshaokun@hisilicon.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=maz@kernel.org \
    --cc=tglx@linutronix.de \
    --cc=wangwudi@hisilicon.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.