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From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 08/20] drm/i915/dp: Reuse intel_hdmi_tmds_clock()
Date: Thu, 10 Feb 2022 18:04:15 +0530	[thread overview]
Message-ID: <3f37846d-3982-cf11-66ee-082f3a05632f@intel.com> (raw)
In-Reply-To: <20211015133921.4609-9-ville.syrjala@linux.intel.com>

LGTM

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

On 10/15/2021 7:09 PM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Reuse intel_hdmi_tmds_clock() for DP->HDMI TMDS clock calculations.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_dp.c   | 20 +++++---------------
>   drivers/gpu/drm/i915/display/intel_hdmi.c |  2 +-
>   drivers/gpu/drm/i915/display/intel_hdmi.h |  1 +
>   3 files changed, 7 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 5cc99ffc1841..45e4bf54e1de 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -814,9 +814,8 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
>   		return MODE_CLOCK_HIGH;
>   
>   	/* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
> -	tmds_clock = target_clock;
> -	if (drm_mode_is_420_only(info, mode))
> -		tmds_clock /= 2;
> +	tmds_clock = intel_hdmi_tmds_clock(target_clock, 8,
> +					   drm_mode_is_420_only(info, mode));
>   
>   	if (intel_dp->dfp.min_tmds_clock &&
>   	    tmds_clock < intel_dp->dfp.min_tmds_clock)
> @@ -1070,21 +1069,12 @@ static bool intel_dp_hdmi_ycbcr420(struct intel_dp *intel_dp,
>   		 intel_dp->dfp.ycbcr_444_to_420);
>   }
>   
> -static int intel_dp_hdmi_tmds_clock(struct intel_dp *intel_dp,
> -				    const struct intel_crtc_state *crtc_state, int bpc)
> -{
> -	int clock = crtc_state->hw.adjusted_mode.crtc_clock * bpc / 8;
> -
> -	if (intel_dp_hdmi_ycbcr420(intel_dp, crtc_state))
> -		clock /= 2;
> -
> -	return clock;
> -}
> -
>   static bool intel_dp_hdmi_tmds_clock_valid(struct intel_dp *intel_dp,
>   					   const struct intel_crtc_state *crtc_state, int bpc)
>   {
> -	int tmds_clock = intel_dp_hdmi_tmds_clock(intel_dp, crtc_state, bpc);
> +	int clock = crtc_state->hw.adjusted_mode.crtc_clock;
> +	int tmds_clock = intel_hdmi_tmds_clock(clock, bpc,
> +					       intel_dp_hdmi_ycbcr420(intel_dp, crtc_state));
>   
>   	if (intel_dp->dfp.min_tmds_clock &&
>   	    tmds_clock < intel_dp->dfp.min_tmds_clock)
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index c6586d10a9d0..f1d42279a2df 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -1868,7 +1868,7 @@ hdmi_port_clock_valid(struct intel_hdmi *hdmi,
>   	return MODE_OK;
>   }
>   
> -static int intel_hdmi_tmds_clock(int clock, int bpc, bool ycbcr420_output)
> +int intel_hdmi_tmds_clock(int clock, int bpc, bool ycbcr420_output)
>   {
>   	/* YCBCR420 TMDS rate requirement is half the pixel clock */
>   	if (ycbcr420_output)
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h
> index ee144db67e66..d892cbff0da0 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
> @@ -47,6 +47,7 @@ bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_state,
>   				    const struct drm_connector_state *conn_state);
>   bool intel_hdmi_bpc_possible(const struct intel_crtc_state *crtc_state,
>   			     int bpc, bool has_hdmi_sink, bool ycbcr420_output);
> +int intel_hdmi_tmds_clock(int clock, int bpc, bool ycbcr420_output);
>   int intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width,
>   			   int num_slices, int output_format, bool hdmi_all_bpp,
>   			   int hdmi_max_chunk_bytes);

  reply	other threads:[~2022-02-10 12:34 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-15 13:39 [Intel-gfx] [PATCH 00/20] drm/i915: Fix up DP DFP 4:2:0 handling more Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 01/20] drm/i915/hdmi: Split intel_hdmi_bpc_possible() to source vs. sink pair Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 02/20] drm/i915/hdmi: Introduce intel_hdmi_is_ycbr420() Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 03/20] drm/i915/hdmi: Introduce intel_hdmi_tmds_clock() Ville Syrjala
2021-10-19 18:16   ` Jani Nikula
2021-10-19 18:19     ` Ville Syrjälä
2021-10-15 13:39 ` [Intel-gfx] [PATCH 04/20] drm/i915/hdmi: Unify "4:2:0 also" logic between .mode_valid() and .compute_config() Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 05/20] drm/i915/hdmi: Extract intel_hdmi_output_format() Ville Syrjala
2021-10-19 19:28   ` Jani Nikula
2021-10-15 13:39 ` [Intel-gfx] [PATCH 06/20] drm/i915/hdmi: Clean up TMDS clock limit exceeding user mode handling Ville Syrjala
2022-01-21  9:57   ` Lisovskiy, Stanislav
2021-10-15 13:39 ` [Intel-gfx] [PATCH 07/20] drm/i915/hdmi: Simplify intel_hdmi_mode_clock_valid() Ville Syrjala
2022-02-10 12:32   ` Nautiyal, Ankit K
2021-10-15 13:39 ` [Intel-gfx] [PATCH 08/20] drm/i915/dp: Reuse intel_hdmi_tmds_clock() Ville Syrjala
2022-02-10 12:34   ` Nautiyal, Ankit K [this message]
2021-10-15 13:39 ` [Intel-gfx] [PATCH 09/20] drm/i915/dp: Extract intel_dp_tmds_clock_valid() Ville Syrjala
2021-12-10  5:20   ` Nautiyal, Ankit K
2021-12-15 20:17     ` Ville Syrjälä
2021-10-15 13:39 ` [Intel-gfx] [PATCH 10/20] drm/i915/dp: Respect the sink's max TMDS clock when dealing with DP->HDMI DFPs Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 11/20] drm/i915/dp: Extract intel_dp_has_audio() Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 12/20] drm/i915/dp: s/intel_dp_hdmi_ycbcr420/intel_dp_is_ycbcr420/ Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 13/20] drm/i915/dp: Reorder intel_dp_compute_config() a bit Ville Syrjala
2021-10-27  7:06   ` Nautiyal, Ankit K
2021-10-27  8:49     ` Ville Syrjälä
2021-10-15 13:39 ` [Intel-gfx] [PATCH 14/20] drm/i915/dp: Pass around intel_connector rather than drm_connector Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 15/20] drm/i915/dp: Make intel_dp_output_format() usable for "4:2:0 also" modes Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 16/20] drm/i915/dp: Rework HDMI DFP TMDS clock handling Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 17/20] drm/i915/dp: Add support for "4:2:0 also" modes for DP Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 18/20] drm/i915/dp: Duplicate native HDMI TMDS clock limit handling for DP HDMI DFPs Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 19/20] drm/i915/dp: Fix DFP rgb->ycbcr conversion matrix Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 20/20] drm/i915/dp: Disable DFP RGB->YCbCr conversion for now Ville Syrjala
2021-10-27  7:27   ` Nautiyal, Ankit K
2021-10-27  8:54     ` Ville Syrjälä
2021-12-10  6:04       ` Nautiyal, Ankit K
2021-10-15 14:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix up DP DFP 4:2:0 handling more Patchwork
2021-10-15 15:00 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-15 21:39 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-10-27  6:59 ` [Intel-gfx] [PATCH 00/20] " Nautiyal, Ankit K

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