Re: [PATCH v2 2/2] clk: samsung: exynos5420: Avoid __clk_lookup() calls when enabling clocks

From: Sylwester Nawrocki <s.nawrocki@samsung.com>
To: linux-clk@vger.kernel.org
Cc: tomasz.figa@gmail.com, cw00.choi@samsung.com, sboyd@kernel.org,
	mturquette@baylibre.com, linux-samsung-soc@vger.kernel.org,
	linux-kernel@vger.kernel.org, b.zolnierkie@samsung.com,
	m.szyprowski@samsung.com
Subject: Re: [PATCH v2 2/2] clk: samsung: exynos5420: Avoid __clk_lookup() calls when enabling clocks
Date: Thu, 17 Sep 2020 12:14:28 +0200	[thread overview]
Message-ID: <534c401e-611e-4cb4-644d-8ed9d00ce36d@samsung.com> (raw)
In-Reply-To: <20200811151251.31613-2-s.nawrocki@samsung.com>

On 11.08.2020 17:12, Sylwester Nawrocki wrote:
> This patch adds a clk ID to the mout_sw_aclk_g3d clk definition so related
> clk pointer gets cached in the driver's private data and can be used
> later instead of a __clk_lookup() call.
> 
> With that we have all clocks used in the clk_prepare_enable() calls in the
> clk provider init callback cached in clk_data.hws[] and we can reference
> the clk pointers directly rather than using __clk_lookup() with global names.
> 
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> ---
> Changes for v2:
>  - added missing part of the patch lost during rebase of the previous version

Actually that conflict resolution was incorrect and I squashed 
below patch as a correction.

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From 1594bdb8fd1ab85e994d638256d214adff4e9d40 Mon Sep 17 00:00:00 2001
From: Sylwester Nawrocki <s.nawrocki@samsung.com>
Date: Thu, 17 Sep 2020 11:42:14 +0200
Subject: [PATCH] clk: samsung: exynos5420: Fix assignment of hws

Fix incorrect rebase conflict resolution.

Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
---
 drivers/clk/samsung/clk-exynos5420.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index ba4e0a4..3ccd4ea 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -1574,6 +1574,7 @@ static void __init exynos5x_clk_init(struct device_node *np,
 	exynos5x_soc = soc;
 
 	ctx = samsung_clk_init(np, reg_base, CLK_NR_CLKS);
+	hws = ctx->clk_data.hws;
 
 	samsung_clk_of_register_fixed_ext(ctx, exynos5x_fixed_rate_ext_clks,
 			ARRAY_SIZE(exynos5x_fixed_rate_ext_clks),
@@ -1651,7 +1652,6 @@ static void __init exynos5x_clk_init(struct device_node *np,
 				     exynos5x_subcmus);
 	}
 
-	hws = ctx->clk_data.hws;
 	/*
 	 * Keep top part of G3D clock path enabled permanently to ensure
 	 * that the internal busses get their clock regardless of the
-- 
2.7.4
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