Re: [PATCH 09/10] drm/i915: Add debugfs knobs for VLVCHV memory latency values

From: Clint Taylor <clinton.a.taylor@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 09/10] drm/i915: Add debugfs knobs for VLVCHV memory latency values
Date: Fri, 26 Jun 2015 13:24:07 -0700	[thread overview]
Message-ID: <558DB4E7.207@intel.com> (raw)
In-Reply-To: <1435172410-9834-10-git-send-email-ville.syrjala@linux.intel.com>

On 06/24/2015 12:00 PM, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Allow tweaking the VLV/CHV memory latencies thorugh sysfs, like we do
> for ILK+.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/i915_debugfs.c | 24 +++++++++++++++++++-----
>   1 file changed, 19 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index c49fe2a..656bb0d 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -4180,8 +4180,15 @@ static const struct file_operations i915_displayport_test_type_fops = {
>   static void wm_latency_show(struct seq_file *m, const uint16_t wm[8])
>   {
>   	struct drm_device *dev = m->private;
> -	int num_levels = ilk_wm_max_level(dev) + 1;
>   	int level;
> +	int num_levels;
> +
> +	if (IS_CHERRYVIEW(dev))
> +		num_levels = 3;
> +	else if (IS_VALLEYVIEW(dev))
> +		num_levels = 1;
> +	else
> +		num_levels = ilk_wm_max_level(dev) + 1;
>
>   	drm_modeset_lock_all(dev);
>
> @@ -4190,9 +4197,9 @@ static void wm_latency_show(struct seq_file *m, const uint16_t wm[8])
>
>   		/*
>   		 * - WM1+ latency values in 0.5us units
> -		 * - latencies are in us on gen9
> +		 * - latencies are in us on gen9/vlv/chv
>   		 */
> -		if (INTEL_INFO(dev)->gen >= 9)
> +		if (INTEL_INFO(dev)->gen >= 9 || IS_VALLEYVIEW(dev))
>   			latency *= 10;
>   		else if (level > 0)
>   			latency *= 5;
> @@ -4256,7 +4263,7 @@ static int pri_wm_latency_open(struct inode *inode, struct file *file)
>   {
>   	struct drm_device *dev = inode->i_private;
>
> -	if (HAS_GMCH_DISPLAY(dev))
> +	if (INTEL_INFO(dev)->gen < 5)
>   		return -ENODEV;
>
>   	return single_open(file, pri_wm_latency_show, dev);
> @@ -4288,11 +4295,18 @@ static ssize_t wm_latency_write(struct file *file, const char __user *ubuf,
>   	struct seq_file *m = file->private_data;
>   	struct drm_device *dev = m->private;
>   	uint16_t new[8] = { 0 };
> -	int num_levels = ilk_wm_max_level(dev) + 1;
> +	int num_levels;
>   	int level;
>   	int ret;
>   	char tmp[32];
>
> +	if (IS_CHERRYVIEW(dev))
> +		num_levels = 3;
> +	else if (IS_VALLEYVIEW(dev))
> +		num_levels = 1;
> +	else
> +		num_levels = ilk_wm_max_level(dev) + 1;
> +
>   	if (len >= sizeof(tmp))
>   		return -EINVAL;
>
>

Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Tested-by: Clint Taylor <Clinton.A.Taylor@intel.com>

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