Re: [PATCH V6] PCI: rcar: Add L1 link state fix into data abort hook

From: Marek Vasut <marek.vasut@gmail.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Wolfram Sang <wsa@the-dreams.de>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	linux-renesas-soc@vger.kernel.org, pali@kernel.org
Subject: Re: [PATCH V6] PCI: rcar: Add L1 link state fix into data abort hook
Date: Mon, 19 Jul 2021 17:38:59 +0200	[thread overview]
Message-ID: <59d5a3bd-9b31-0203-ca99-46a92ffc9895@gmail.com> (raw)
In-Reply-To: <20210719085953.GA17481@lpieralisi>

On 7/19/21 10:59 AM, Lorenzo Pieralisi wrote:
> [+Pali]
> 
> On Sat, Jul 17, 2021 at 12:33:34PM -0500, Bjorn Helgaas wrote:
>> On Fri, May 14, 2021 at 10:05:49PM +0200, marek.vasut@gmail.com wrote:
>>> From: Marek Vasut <marek.vasut+renesas@gmail.com>
>>>
>>> The R-Car PCIe controller is capable of handling L0s/L1 link states.
>>> While the controller can enter and exit L0s link state, and exit L1
>>> link state, without any additional action from the driver, to enter
>>> L1 link state, the driver must complete the link state transition by
>>> issuing additional commands to the controller.
>>>
>>> The problem is, this transition is not atomic. The controller sets
>>> PMEL1RX bit in PMSR register upon reception of PM_ENTER_L1 DLLP from
>>> the PCIe card, but then the controller enters some sort of inbetween
>>> state. The driver must detect this condition and complete the link
>>> state transition, by setting L1IATN bit in PMCTLR and waiting for
>>> the link state transition to complete.
>>>
>>> If a PCIe access happens inside this window, where the controller
>>> is between L0 and L1 link states, the access generates a fault and
>>> the ARM 'imprecise external abort' handler is invoked.
>>>
>>> Just like other PCI controller drivers, here we hook the fault handler,
>>> perform the fixup to help the controller enter L1 link state, and then
>>> restart the instruction which triggered the fault. Since the controller
>>> is in L1 link state now, the link can exit from L1 link state to L0 and
>>> successfully complete the access.
>>>
>>> While it was suggested to disable L1 link state support completely on
>>> the controller level, this would not prevent the L1 link state entry
>>> initiated by the link partner. This happens e.g. in case a PCIe card
>>> enters D3Hot state, which could be initiated from pci_set_power_state()
>>> if the card indicates D3Hot support, which in turn means link must enter
>>> L1 state. So instead, fix up the L1 link state after all.
>>>
>>> Note that this fixup is applicable only to Aarch32 R-Car controllers,
>>> the Aarch64 R-Car perform the same fixup in TFA, see TFA commit [1]
>>> 0969397f2 ("rcar_gen3: plat: Prevent PCIe hang during L1X config access")
>>> [1] https://github.com/ARM-software/arm-trusted-firmware/commit/0969397f295621aa26b3d14b76dd397d22be58bf
>>
>> This patch is horribly ugly but it's working around a horrible
>> hardware problem, and I don't have any better suggestions, so I guess
>> we don't really have much choice.
> 
> Pali is doing some work on the matter (in particular [1] above) and I
> was following that up to see if there was any outcome before merging
> this code, I could not follow up myself for lack of time.

arm32 r-car does NOT use atf, so this does not apply here.