From: "Jan Beulich" <JBeulich@suse.com>
To: Pu Wen <puwen@hygon.cn>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
Wei Liu <wei.liu2@citrix.com>,
xen-devel <xen-devel@lists.xenproject.org>,
Roger Pau Monne <roger.pau@citrix.com>
Subject: Re: [PATCH v4 02/15] x86/cpu: Fix common cpuid faulting probing for AMD and Hygon
Date: Tue, 02 Apr 2019 04:19:44 -0600 [thread overview]
Message-ID: <5CA337400200007800223D81@prv1-mh.provo.novell.com> (raw)
In-Reply-To: <3584da10-e33c-b382-bbb3-c12b538de30a@hygon.cn>
>>> On 02.04.19 at 08:46, <puwen@hygon.cn> wrote:
> On 2019/4/1 16:41, Jan Beulich wrote:
>> On 30.03.19 at 11:42, <puwen@hygon.cn> wrote:
>>> There is no MSR_INTEL_PLATFORM_INFO for AMD and Hygon families. So directly
>>> return false in the function probe_cpuid_faulting() if !cpu_has_hypervisor.
>>
>> I think it would have been nice if you had mentioned the real
>> reason why you want to bypass the MSR accesses. This way it
>> sounds as if the change was only cosmetic, and hence could be
>> left out.
>
> Okay, how about the new description:
> There is no MSR_INTEL_PLATFORM_INFO for AMD and Hygon families. Read
> this MSR will stop the Xen initialization process
"... for some early Hygon steppings"(?). I'm unaware of AMD CPUs
having this issue - are you telling us otherwise?
Jan
> or produce GPF(0).
> So directly return false in the function probe_cpuid_faulting() if
> !cpu_has_hypervisor.
>
> --
> Regards,
> Pu Wen
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next prev parent reply other threads:[~2019-04-02 10:19 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-30 10:40 [PATCH v4 00/15] Add support for Hygon Dhyana Family 18h processor Pu Wen
2019-03-30 10:42 ` [PATCH v4 01/15] x86/cpu: Create Hygon Dhyana architecture support file Pu Wen
2019-04-02 12:13 ` Andrew Cooper
2019-04-02 13:09 ` Pu Wen
2019-04-03 8:42 ` Jan Beulich
2019-04-03 10:05 ` Pu Wen
2019-04-03 10:21 ` Jan Beulich
2019-04-03 15:27 ` Pu Wen
2019-03-30 10:42 ` [PATCH v4 02/15] x86/cpu: Fix common cpuid faulting probing for AMD and Hygon Pu Wen
2019-04-01 8:40 ` Jan Beulich
2019-04-02 6:46 ` Pu Wen
2019-04-02 10:19 ` Jan Beulich [this message]
2019-04-02 11:58 ` Pu Wen
2019-04-02 15:46 ` Jan Beulich
2019-04-02 15:49 ` Andrew Cooper
2019-04-02 16:14 ` Pu Wen
2019-04-02 17:04 ` Andrew Cooper
2019-04-02 10:30 ` Andrew Cooper
2019-04-02 15:44 ` Jan Beulich
2019-03-30 10:42 ` [PATCH v4 03/15] x86/cpu/mtrr: Add Hygon Dhyana support to get TOP_MEM2 Pu Wen
2019-03-30 10:42 ` [PATCH v4 04/15] x86/cpu/vpmu: Add Hygon Dhyana and AMD Zen support for vPMU Pu Wen
2019-04-01 8:35 ` Jan Beulich
2019-04-02 6:46 ` Pu Wen
2019-04-02 10:20 ` Jan Beulich
2019-04-02 12:11 ` Pu Wen
2019-04-02 15:50 ` Jan Beulich
2019-04-02 16:26 ` Pu Wen
2019-03-30 10:43 ` [PATCH v4 05/15] x86/cpu/mce: Add Hygon Dhyana support to the MCA infrastructure Pu Wen
2019-03-30 10:43 ` [PATCH v4 06/15] x86/spec_ctrl: Add Hygon Dhyana to the respective mitigation machinery Pu Wen
2019-03-30 10:43 ` [PATCH v4 07/15] x86/apic: Add Hygon Dhyana support Pu Wen
2019-03-30 10:43 ` [PATCH v4 08/15] x86/acpi: " Pu Wen
2019-03-30 10:44 ` [PATCH v4 09/15] x86/iommu: " Pu Wen
2019-03-30 10:44 ` [PATCH v4 10/15] x86/pv: Add Hygon Dhyana support to emulate MSRs access Pu Wen
2019-03-30 10:44 ` [PATCH v4 11/15] x86/domain: Add Hygon Dhyana support Pu Wen
2019-03-30 10:44 ` [PATCH v4 12/15] x86/domctl: " Pu Wen
2019-03-30 10:44 ` [PATCH v4 13/15] x86/traps: " Pu Wen
2019-03-30 10:44 ` [PATCH v4 14/15] x86/cpuid: " Pu Wen
2019-03-30 10:44 ` [PATCH v4 15/15] tools/libxc: " Pu Wen
2019-04-02 15:00 ` [PATCH v4 00/15] Add support for Hygon Dhyana Family 18h processor Andrew Cooper
2019-04-02 16:00 ` Pu Wen
2019-04-02 16:15 ` Jan Beulich
2019-04-03 15:21 ` Pu Wen
2019-04-03 15:33 ` Jan Beulich
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