Re: [PATCH V3][3/4] mmc: Add dw mobile mmc cmdq rtk driver

From: Krzysztof Kozlowski <krzk@kernel.org>
To: Jyan Chou <jyanchou@realtek.com>,
	adrian.hunter@intel.com, jh80.chung@samsung.com,
	ulf.hansson@linaro.org
Cc: riteshh@codeaurora.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
	asutoshd@codeaurora.org, p.zabel@pengutronix.de,
	linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, arnd@arndb.de,
	briannorris@chromium.org, doug@schmorgal.com,
	tonyhuang.sunplus@gmail.com, abel.vesa@linaro.org,
	william.qiu@starfivetech.com
Subject: Re: [PATCH V3][3/4] mmc: Add dw mobile mmc cmdq rtk driver
Date: Mon, 23 Oct 2023 10:04:09 +0200	[thread overview]
Message-ID: <5bc8fd15-9ae7-449d-9625-6e8c87876b06@kernel.org> (raw)
In-Reply-To: <20231020034921.1179-4-jyanchou@realtek.com>

On 20/10/2023 05:49, Jyan Chou wrote:
> Add Realtek mmc driver to make good use Synopsys
> DesignWare mmc cmdq host driver.
> 
> Signed-off-by: Jyan Chou <jyanchou@realtek.com>
> 
> ---

> +static int dw_mci_rtk_init(struct dw_mci *host)
> +{
> +	struct dw_mci_rtkemmc_host *priv = host->priv;
> +
> +	host->pdata->caps2 = MMC_CAP2_NO_SDIO | MMC_CAP2_NO_SD;
> +
> +	if (priv->emmc_mode >= 2)
> +		host->pdata->caps2 |= MMC_CAP2_HS200_1_8V_SDR;
> +	if (priv->emmc_mode >= 3) {
> +		host->pdata->caps |= MMC_CAP_1_8V_DDR;
> +		host->pdata->caps2 |= MMC_CAP2_HS400_1_8V;
> +	}
> +
> +	if (priv->is_cqe > 0)
> +		host->pdata->caps2 |= (MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD);
> +
> +	/*In Realtek Platform, only using 32bit DMA*/

Use Linux coding style. This driver looks like one for staging, not
ready for submission. :/

> +	host->dma_64bit_address = 0;
> +
> +	/*In Realtek Platform, do not use PIO mode by default*/
> +	host->use_dma = TRANS_MODE_DMA;
> +
> +	host->irq_flags = IRQF_SHARED;
> +
> +	mcq_writel(host, CP, 0x0);
> +
> +	/*Enable L4 gated*/
> +	mcq_writel(host, OTHER1, mcq_readl(host, OTHER1) &
> +		~(SDMMC_L4_GATED_DIS | SDMMC_L4_GATED_DIS1));
> +
> +	mcq_writel(host, OTHER1, mcq_readl(host, OTHER1) &
> +		   (~(SDMMC_DQS_CTRL_GATE_DIS | SDMMC_DBUS_MAS_GATING_DIS)));
> +
> +	/*Set the eMMC wrapper little Endian*/
> +	mcq_writel(host, AHB, mcq_readl(host, AHB) | SDMMC_AHB_BIG);
> +
> +	mcq_writel(host, OTHER1,
> +		   mcq_readl(host, OTHER1) | SDMMC_STARK_CARD_STOP_ENABLE);
> +
> +	/*set eMMC instead of nand*/
> +	regmap_update_bits_base(priv->m2tmx, SDMMC_NAND_DMA_SEL,
> +				SDMMC_SRAM_DMA_SEL, SDMMC_SRAM_DMA_SEL, NULL, false, true);
> +
> +	/*Set the clk initial phase*/
> +	dw_mci_rtk_phase_tuning(host, 0, 0);
> +
> +	return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +static int dw_mci_rtk_suspend(struct device *dev)
> +{
> +	struct dw_mci *host = dev_get_drvdata(dev);
> +	int ret = 0;
> +
> +	ret = dw_mci_cqe_runtime_suspend(dev);
> +
> +	mcq_writel(host, AHB, 0);
> +	dev_info(dev, "AHB=0x%x, dw_mci_cqe_suspend ret=%d\n",
> +		 mcq_readl(host, AHB), ret);

Drop useless success/function entry/exit messages..

> +
> +	return ret;
> +}
> +
> +static int dw_mci_rtk_resume(struct device *dev)
> +{
> +	struct dw_mci *host = dev_get_drvdata(dev);
> +	int ret = 0;
> +
> +	mcq_writel(host, AHB, mcq_readl(host, AHB) | SDMMC_AHB_BIG);
> +
> +	ret = dw_mci_cqe_runtime_resume(dev);
> +
> +	dev_info(dev, "AHB=0x%x, dw_mci_cqe_resume ret=%d\n",
> +		 mcq_readl(host, AHB), ret);

Drop useless success/function entry/exit messages..

> +
> +	return ret;
> +}
> +#else
> +static int dw_mci_rtk_suspend(struct device *dev)
> +{
> +	dev_err(dev, "User should enable CONFIG_PM kernel config\n");

Why? This is not an error. If it were, then it should be build stage error.

> +
> +	return 0;
> +}
> +
> +static int dw_mci_rtk_resume(struct device *dev)
> +{
> +	dev_err(dev, "User should enable CONFIG_PM kernel config\n");
> +
> +	return 0;
> +}
> +#endif /*CONFIG_PM*/
> +static const struct dev_pm_ops rtk_dev_pm_ops = {
> +	SET_SYSTEM_SLEEP_PM_OPS(dw_mci_rtk_suspend,
> +				dw_mci_rtk_resume)
> +	SET_RUNTIME_PM_OPS(dw_mci_cqe_runtime_suspend,
> +			   dw_mci_cqe_runtime_resume,
> +			   NULL)
> +};
> +
> +static void dw_mci_rtk_shutdown(struct platform_device *pdev)
> +{
> +	dev_info(&pdev->dev, "[eMMC] Shutdown\n");
> +	dw_mci_cqe_runtime_resume(&pdev->dev);
> +}
> +
> +static unsigned long dw_mci_rtk_dwmmc_caps[1] = {
> +	MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
> +	MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED |
> +	MMC_CAP_NONREMOVABLE | MMC_CAP_CMD23,
> +};
> +
> +static const struct dw_mci_drv_data rtk_drv_data = {
> +	.caps                   = dw_mci_rtk_dwmmc_caps,
> +	.num_caps               = ARRAY_SIZE(dw_mci_rtk_dwmmc_caps),
> +	.set_ios                = dw_mci_rtk_set_ios,
> +	.execute_tuning         = dw_mci_rtk_execute_tuning,
> +	.parse_dt               = dw_mci_rtk_parse_dt,
> +	.init                   = dw_mci_rtk_init,
> +	.prepare_hs400_tuning	= dw_mci_rtk_prepare_hs400_tuning,
> +	.hs400_complete         = dw_mci_rtk_hs400_complete,
> +	.init_card		= dw_mci_rtk_init_card,
> +};
> +
> +static const struct of_device_id dw_mci_rtk_match[] = {
> +	{ .compatible = "realtek,rtd-dw-cqe-emmc",
> +		.data = &rtk_drv_data },
> +	{},
> +};
> +MODULE_DEVICE_TABLE(of, dw_mci_rtk_match);
> +
> +int dw_mci_cqe_pltfm_register(struct platform_device *pdev,
> +			      const struct dw_mci_drv_data *drv_data)
> +{
> +	struct dw_mci *host;
> +	struct resource	*regs;
> +
> +	host = devm_kzalloc(&pdev->dev, sizeof(struct dw_mci), GFP_KERNEL);
> +	if (!host)
> +		return -ENOMEM;
> +
> +	host->irq = platform_get_irq(pdev, 0);
> +	if (host->irq < 0)
> +		return host->irq;
> +
> +	host->drv_data = drv_data;
> +	host->pdev = pdev;
> +	host->dev = &pdev->dev;
> +	host->irq_flags = 0;
> +	host->pdata = pdev->dev.platform_data;
> +
> +	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	host->regs = devm_ioremap_resource(&pdev->dev, regs);
> +	if (IS_ERR(host->regs))
> +		return PTR_ERR(host->regs);
> +
> +	/* Get registers' physical base address */
> +	host->phy_regs = regs->start;
> +
> +	platform_set_drvdata(pdev, host);
> +
> +	return dw_mci_cqe_probe(host);
> +}
> +
> +static int dw_mci_rtk_probe(struct platform_device *pdev)
> +{
> +	const struct dw_mci_drv_data *drv_data;
> +	const struct of_device_id *match;
> +
> +	if (!pdev->dev.of_node)
> +		return -ENODEV;
> +
> +	match = of_match_node(dw_mci_rtk_match, pdev->dev.of_node);
> +	drv_data = match->data;
> +
> +	return dw_mci_cqe_pltfm_register(pdev, drv_data);
> +}
> +
> +int dw_mci_rtk_remove(struct platform_device *pdev)
> +{
> +	struct dw_mci *host = platform_get_drvdata(pdev);
> +
> +	dw_mci_cqe_remove(host);
> +	return 0;
> +}
> +
> +static struct platform_driver dw_mci_rtk_pltfm_driver = {
> +	.probe          = dw_mci_rtk_probe,
> +	.remove         = dw_mci_rtk_remove,
> +	.driver         = {
> +		.name           = "dwmmc_cqe_rtk",
> +		.of_match_table = dw_mci_rtk_match,
> +		.pm             = &rtk_dev_pm_ops,
> +	},
> +	.shutdown   = dw_mci_rtk_shutdown,
> +};
> +
> +module_platform_driver(dw_mci_rtk_pltfm_driver);
> +
> +MODULE_AUTHOR("<jyanchou@realtek.com>");
> +MODULE_DESCRIPTION(" Specific Driver Extension");
> +MODULE_ALIAS("platform:dwmmc_cqe_rtk");

You should not need MODULE_ALIAS() in normal cases. If you need it,
usually it means your device ID table is wrong.

Best regards,
Krzysztof