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From: "Souza, Jose" <jose.souza@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 5/6] drm/i915: Move the TMDS clock division into intel_hdmi_mode_clock_valid()
Date: Fri, 14 May 2021 17:44:25 +0000	[thread overview]
Message-ID: <61387858b62d3a876348e11313c67c15105ba98c.camel@intel.com> (raw)
In-Reply-To: <YJ61Nhg38iElyPXG@intel.com>

On Fri, 2021-05-14 at 20:36 +0300, Ville Syrjälä wrote:
> On Fri, May 14, 2021 at 05:28:40PM +0000, Souza, Jose wrote:
> > On Tue, 2021-05-11 at 19:05 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > Now that we have to tell intel_hdmi_mode_clock_valid() whether
> > > we're asking about 4:4:4 or 4:2:0 output it can take care of
> > > the dotclock->TMDS clock conversion.
> > > 
> > > Cc: Werner Sembach <wse@tuxedocomputers.com>
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_hdmi.c | 6 +++---
> > >  1 file changed, 3 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > > index 874fb897005a..80e2ae652f6e 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > > @@ -1907,6 +1907,9 @@ intel_hdmi_mode_clock_valid(struct drm_connector *connector, int clock,
> > >  	struct intel_hdmi *hdmi = intel_attached_hdmi(to_intel_connector(connector));
> > >  	enum drm_mode_status status;
> > >  
> > > +	if (ycbcr420_output)
> > > +		clock /= 2;
> > > +
> > >  	/* check if we can do 8bpc */
> > >  	status = hdmi_port_clock_valid(hdmi, intel_hdmi_port_clock(clock, 8),
> > >  				       true, has_hdmi_sink);
> > > @@ -1957,8 +1960,6 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
> > >  	}
> > >  
> > >  	ycbcr_420_only = drm_mode_is_420_only(&connector->display_info, mode);
> > > -	if (ycbcr_420_only)
> > > -		clock /= 2;
> > >  
> > >  	status = intel_hdmi_mode_clock_valid(connector, clock, has_hdmi_sink, ycbcr_420_only);
> > >  	if (status != MODE_OK) {
> > > @@ -1967,7 +1968,6 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
> > >  		    !drm_mode_is_420_also(&connector->display_info, mode))
> > >  			return status;
> > >  
> > > -		clock /= 2;
> > 
> > The clock intel_hdmi_mode_clock_valid() call will be clock/2 not clock/4 as previous.
> 
> It's never clock/4.

Found the "if (ycbcr_420_only ||" that I missed.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 

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  reply	other threads:[~2021-05-14 17:44 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-11 16:05 [Intel-gfx] [PATCH 0/6] drm/i915: Check HDMI sink deep color capabilities during .mode_valid() Ville Syrjala
2021-05-11 16:05 ` [Intel-gfx] [PATCH 1/6] drm/i915: Extract intel_hdmi_bpc_possible() Ville Syrjala
2021-05-14 17:33   ` Souza, Jose
2021-05-11 16:05 ` [Intel-gfx] [PATCH 2/6] drm/i915: Move has_hdmi_sink check into intel_hdmi_bpc_possible() Ville Syrjala
2021-05-14 17:33   ` Souza, Jose
2021-05-11 16:05 ` [Intel-gfx] [PATCH 3/6] drm/i915: Move platform checks " Ville Syrjala
2021-05-14 17:33   ` Souza, Jose
2021-05-11 16:05 ` [Intel-gfx] [PATCH 4/6] drm/i915: Check sink deep color capabilitis during HDMI .mode_valid() Ville Syrjala
2021-05-14 17:33   ` Souza, Jose
2021-05-11 16:05 ` [Intel-gfx] [PATCH 5/6] drm/i915: Move the TMDS clock division into intel_hdmi_mode_clock_valid() Ville Syrjala
2021-05-14 17:28   ` Souza, Jose
2021-05-14 17:36     ` Ville Syrjälä
2021-05-14 17:44       ` Souza, Jose [this message]
2021-05-11 16:05 ` [Intel-gfx] [PATCH 6/6] drm/i915: Drop redundant has_hdmi_sink check Ville Syrjala
2021-05-14 17:34   ` Souza, Jose
2021-05-11 19:02 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Check HDMI sink deep color capabilities during .mode_valid() Patchwork
2021-05-12 20:40 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Check HDMI sink deep color capabilities during .mode_valid() (rev2) Patchwork
2021-05-13  3:10 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-05-25 17:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Check HDMI sink deep color capabilities during .mode_valid() (rev3) Patchwork
2021-05-25 23:23 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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