Re: [PATCH 00/46] CXL PMEM Region Provisioning

From: Dan Williams <dan.j.williams@intel.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, Ira Weiny <ira.weiny@intel.com>,
	"Christoph Hellwig" <hch@infradead.org>,
	Jason Gunthorpe <jgg@nvidia.com>,
	Ben Widawsky <bwidawsk@kernel.org>,
	Alison Schofield <alison.schofield@intel.com>,
	"Matthew Wilcox" <willy@infradead.org>, <nvdimm@lists.linux.dev>,
	<linux-pci@vger.kernel.org>, <patches@lists.linux.dev>
Subject: Re: [PATCH 00/46] CXL PMEM Region Provisioning
Date: Fri, 24 Jun 2022 08:32:52 -0700	[thread overview]
Message-ID: <62b5d9249edf2_8070294d2@dwillia2-xfh.notmuch> (raw)
In-Reply-To: <20220624161310.00006689@huawei.com>

Jonathan Cameron wrote:
> On Thu, 23 Jun 2022 19:45:00 -0700
> Dan Williams <dan.j.williams@intel.com> wrote:
> 
> > tl;dr: 46 patches is way too many patches to review in one sitting. Jump
> > to the PATCH SUMMARY below to find a subset of interest to jump into.
> > 
> > The series is also posted on the 'preview' branch [1]. Note that branch
> > rebases, the tip of that branch at time of posting is:
> > 
> > 7e5ad5cb1580 cxl/region: Introduce cxl_pmem_region objects
> > 
> > [1]: https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git/log/?h=preview
> 
> Via a W=1 build some docs are out of sync with parameter names.
> I'm lazy so I'll leave finding the right patch to you ;)
> drivers/cxl/core/region.c:1490: warning: Function parameter or member 'type' not described in 'devm_cxl_add_region'

Added:

diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index f2a0ead20ca7..f5ca4f811463 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -84,6 +84,7 @@ static struct cxl_region *cxl_region_alloc(struct cxl_root_decoder *cxlrd, int i
  * @cxlrd: root decoder
  * @id: memregion id to create
  * @mode: mode for the endpoint decoders of this region
+ * @type: select whether this is an expander or accelerator (type-2 or type-3)
  *
  * This is the second step of region initialization. Regions exist within an
  * address space which is mapped by a @cxlrd.

...to patch 34.

> drivers/cxl/core/region.c:1719: warning: Function parameter or member 'cxlr' not described in 'devm_cxl_add_pmem_region'
> drivers/cxl/core/region.c:1719: warning: Excess function parameter 'host' description in 'devm_cxl_add_pmem_region'

Added:

diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index 808148eef557..fa209fb649f7 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -1711,8 +1711,8 @@ static void cxlr_pmem_unregister(void *dev)
 }
 
 /**
- * devm_cxl_add_pmem_region() - add a cxl_region to nd_region bridge
- * @host: same host as @cxlmd
+ * devm_cxl_add_pmem_region() - add a cxl_region-to-nd_region bridge
+ * @cxlr: parent CXL region for this pmem region bridge device
  *
  * Return: 0 on success negative error code on failure.
  */

...to patch 46.

> whilst here, docs for generic_nvdimm_flush() need updating to reflect
> generic getting added to the name in 2019...

Sure, but not in this series.
