From: <Conor.Dooley@microchip.com>
To: <i.bornyakov@metrotek.ru>
Cc: <corbet@lwn.net>, <devicetree@vger.kernel.org>,
<hao.wu@intel.com>, <krzysztof.kozlowski+dt@linaro.org>,
<linux-doc@vger.kernel.org>, <linux-fpga@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <mdf@kernel.org>,
<robh+dt@kernel.org>, <system@metrotek.ru>, <trix@redhat.com>,
<yilun.xu@intel.com>
Subject: Re: [PATCH v20 0/4] Microchip Polarfire FPGA manager
Date: Mon, 20 Jun 2022 11:01:49 +0000 [thread overview]
Message-ID: <695b1ea4-ed28-a8ca-8026-88dd58299393@microchip.com> (raw)
In-Reply-To: <20220620105747.2145347-1-conor.dooley@microchip.com>
On 20/06/2022 11:57, Conor Dooley wrote:
> I had a quick check in -next and there's an entry for the BMC
> driver there.
> How about the following? I put you as R, but clearly if you want to be
> maintainer then you are *more than* qualified.
> Feel free to edit the patch if so, either is fine by me.
> You can tack this onto a v21 if you have more changes or I can resend
> standalone once the driver is merged.
>
> Thanks,
> Conor.
>
> From: Conor Dooley <conor.dooley@microchip.com>
> Date: Mon, 20 Jun 2022 11:46:19 +0100
> Subject: [PATCH] MAINTAINERS: add polarfire fpga programmer drivers> Add a MAINTAINERS entry for the newly added PolarFire (MPF) SPI slave
> programming driver.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> MAINTAINERS | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 168e0af869a7..60ab3c4bf65d 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -7869,6 +7869,14 @@ S: Maintained
> F: Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update
> F: drivers/fpga/intel-m10-bmc-sec-update.c
>
> +FPGA PolarFire Drivers
On second thoughts, "FPGA Microchip PolarFire Drivers"?
> +M: Conor Dooley <conor.dooley@microchip.com>
> +R: Ivan Bornyakov <i.bornyakov@metrotek.ru>
> +L: linux-fpga@vger.kernel.org
> +S: Supported
> +F: Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml
> +F: drivers/fpga/microchip-spi.c
> +
> FPU EMULATOR
> M: Bill Metzenthen <billm@melbpc.org.au>
> S: Maintained
>
> base-commit: 07dc787be2316e243a16a33d0a9b734cd9365bd3
next prev parent reply other threads:[~2022-06-20 11:02 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-17 13:48 [PATCH v20 0/4] Microchip Polarfire FPGA manager Ivan Bornyakov
2022-06-17 13:48 ` [PATCH v20 1/4] fpga: fpga-mgr: support bitstream offset in image buffer Ivan Bornyakov
2022-06-21 10:27 ` Xu Yilun
2022-06-17 13:48 ` [PATCH v20 2/4] docs: fpga: mgr: document parse_header() callback Ivan Bornyakov
2022-06-21 10:36 ` Xu Yilun
2022-06-17 13:48 ` [PATCH v20 3/4] fpga: microchip-spi: add Microchip MPF FPGA manager Ivan Bornyakov
2022-06-17 13:48 ` [PATCH v20 4/4] dt-bindings: fpga: add binding doc for microchip-spi fpga mgr Ivan Bornyakov
2022-06-19 18:39 ` [PATCH v20 0/4] Microchip Polarfire FPGA manager Conor.Dooley
2022-06-20 10:07 ` Ivan Bornyakov
2022-06-20 10:57 ` Conor Dooley
2022-06-20 11:01 ` Conor.Dooley [this message]
2022-06-20 18:01 ` Ivan Bornyakov
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