From: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Guenter Roeck <linux@roeck-us.net>,
qemu-devel@nongnu.org, linux-sh@vger.kernel.org
Subject: Re: [PATCH RFC] hw/sh4/sh7750: Add STBCR/STBCR2 register support
Date: Wed, 18 Oct 2023 14:46:02 +0200 [thread overview]
Message-ID: <6fdd4de08a97060b952e0bfa4dd3144d9c23e800.camel@physik.fu-berlin.de> (raw)
In-Reply-To: <20231018124023.2927710-1-geert+renesas@glider.be>
Hi Geert!
On Wed, 2023-10-18 at 14:40 +0200, Geert Uytterhoeven wrote:
> The new Linux SH7750 clock driver uses the registers for power-down
> mode control, causing a crash:
>
> byte read to SH7750_STBCR_A7 (0x000000001fc00004) not supported
> Aborted (core dumped)
>
> Fix this by adding support for the Standby Control Registers STBCR and
> STBCR2.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Is this supposed to be applied on top of Yoshinori's DT conversion series?
Thanks,
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer
`. `' Physicist
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
next prev parent reply other threads:[~2023-10-18 12:46 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-18 12:40 [PATCH RFC] hw/sh4/sh7750: Add STBCR/STBCR2 register support Geert Uytterhoeven
2023-10-18 12:46 ` John Paul Adrian Glaubitz [this message]
2023-10-18 13:03 ` Geert Uytterhoeven
2023-10-19 2:03 ` Yoshinori Sato
2023-10-19 7:14 ` Geert Uytterhoeven
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