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From: Guenter Roeck <linux@roeck-us.net>
To: Marc Zyngier <maz@kernel.org>, Matthew Rosato <mjrosato@linux.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Niklas Schnelle <schnelle@linux.ibm.com>,
	LKML <linux-kernel@vger.kernel.org>,
	x86@kernel.org, Joerg Roedel <joro@8bytes.org>,
	Will Deacon <will@kernel.org>,
	linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jason Gunthorpe <jgg@mellanox.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Alex Williamson <alex.williamson@redhat.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Logan Gunthorpe <logang@deltatee.com>,
	Ashok Raj <ashok.raj@intel.com>, Jon Mason <jdmason@kudzu.us>,
	Allen Hubbe <allenbh@gmail.com>
Subject: Re: [patch V3 09/33] genirq/msi: Add range checking to msi_insert_desc()
Date: Fri, 16 Dec 2022 16:45:50 -0800	[thread overview]
Message-ID: <70dab88e-6119-0c12-7c6a-61bcbe239f66@roeck-us.net> (raw)
In-Reply-To: <86v8mbphzw.wl-maz@kernel.org>

On 12/16/22 05:58, Marc Zyngier wrote:
[ ... ]

>> With both these fixes applied, it actually then leads to the very
>> next WARN_ON failing in msi_ctrl_valid...  Because ctrl->last ==
>> hwsize.  I think Thomas' initial fix for msi_domain_get_hwsize has
>> an off-by-1 error, I think we should return MSI_XA_DOMAIN_SIZE for
>> msi_domain_get_hwsize instead.
> 
> Yes, that's a good point, and that's consistent with what
> __msi_create_irq_domain() does already, assuming MSI_XA_DOMAIN_SIZE
> when info->hwsize is 0. No reason to do something else here.
> 
> I'll update Thomas' patch. Once Guenter confirms that PPC is OK, I'll
> send it out.
> 
With

7a27b6136dcb (local/testing, testing-msi) genirq/msi: Return MSI_XA_DOMAIN_SIZE as the maximum MSI index when no domain is present
c581d525bb1d genirq/msi: Check for the presence of an irq domain when validating msi_ctrl
9d33edb20f7e Merge tag 'irq-core-2022-12-10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

I still get the following runtime warning.

------------[ cut here ]------------
WARNING: CPU: 0 PID: 8 at kernel/irq/msi.c:196 .msi_domain_free_descs+0x144/0x170
Modules linked in:
CPU: 0 PID: 8 Comm: kworker/u2:0 Tainted: G                 N 6.1.0-01957-g7a27b6136dcb #1
Hardware name: QEMU ppce500 e5500 0x80240020 QEMU e500
Workqueue: nvme-reset-wq .nvme_reset_work
NIP:  c000000000107d54 LR: c000000000107d44 CTR: 0000000000000000
REGS: c0000000041e74d0 TRAP: 0700   Tainted: G                 N  (6.1.0-01957-g7a27b6136dcb)
MSR:  0000000080029002 <CE,EE,ME>  CR: 44002282  XER: 20000000
IRQMASK: 0
GPR00: c000000000107d44 c0000000041e7770 c000000001629c00 c000000004e748a0
GPR04: 000000005358db0a c000000001ce7a00 c00000000423b5d0 000000004735aaa2
GPR08: 0000000000000002 0000000000000013 c00000000423acc0 c00000000214a998
GPR12: 0000000024002282 c000000002579000 c00000000008e190 c000000004173540
GPR16: 0000000000000000 c0000000043810b8 0000000000000000 0000000000000001
GPR20: c0000000060b22d8 c0000000060a70f0 0000000000000000 c000000001996800
GPR24: c0000000017df6c0 c0000000043810b8 c0000000060b2388 c0000000060b2000
GPR28: ffffffffffffffff c0000000041e7888 c000000006025ac8 c000000004e748a0
NIP [c000000000107d54] .msi_domain_free_descs+0x144/0x170
LR [c000000000107d44] .msi_domain_free_descs+0x134/0x170
Call Trace:
[c0000000041e7770] [c000000000107d44] .msi_domain_free_descs+0x134/0x170 (unreliable)
[c0000000041e7810] [c0000000001085d8] .msi_domain_free_msi_descs_range+0x38/0x70
[c0000000041e78a0] [c0000000008d000c] .pci_msi_teardown_msi_irqs+0x4c/0xa0
[c0000000041e7920] [c0000000008cf9e8] .pci_free_msi_irqs+0x18/0x50
[c0000000041e79a0] [c0000000008cd8d0] .pci_free_irq_vectors+0x80/0xb0
[c0000000041e7a20] [c000000000a6d2a0] .nvme_reset_work+0x870/0x1780
[c0000000041e7bb0] [c000000000080e68] .process_one_work+0x2d8/0x7b0
[c0000000041e7c90] [c0000000000813d8] .worker_thread+0x98/0x4f0
[c0000000041e7d70] [c00000000008e2cc] .kthread+0x13c/0x150
[c0000000041e7e10] [c0000000000005d8] .ret_from_kernel_thread+0x58/0x60
Instruction dump:
7fc3f378 48ff1ca9 60000000 7c7f1b79 41c2002c e8810070 7fc3f378 48ff3491
60000000 813f0000 2c090000 41e2ffb0 <0fe00000> 60000000 60000000 ebc10090
irq event stamp: 98168
hardirqs last  enabled at (98167): [<c00000000110a274>] ._raw_spin_unlock_irqrestore+0x84/0xd0
hardirqs last disabled at (98168): [<c000000000010b58>] .program_check_exception+0x38/0x120
softirqs last  enabled at (97760): [<c00000000110b4dc>] .__do_softirq+0x60c/0x678
softirqs last disabled at (97749): [<c000000000004d20>] .do_softirq_own_stack+0x30/0x50
---[ end trace 0000000000000000 ]---
nvme nvme0: 1/0/0 default/read/poll queues
nvme nvme0: Ignoring bogus Namespace Identifiers
...

The system boots fine, though. This is seen when booting the ppce500 machine with
e5500 CPU and corenet64_smp_defconfig from nvme.

Guenter


  parent reply	other threads:[~2022-12-17  0:45 UTC|newest]

Thread overview: 126+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-24 23:25 [patch V3 00/33] genirq, PCI/MSI: Support for per device MSI and PCI/IMS - Part 3 implementation Thomas Gleixner
2022-11-24 23:25 ` [patch V3 01/33] genirq/msi: Rearrange MSI domain flags Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-11-24 23:25 ` [patch V3 02/33] genirq/msi: Provide struct msi_parent_ops Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-11-24 23:25 ` [patch V3 03/33] genirq/msi: Provide data structs for per device domains Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-11-24 23:25 ` [patch V3 04/33] genirq/msi: Add size info to struct msi_domain_info Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-11-24 23:25 ` [patch V3 05/33] genirq/msi: Split msi_create_irq_domain() Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-11-24 23:25 ` [patch V3 06/33] genirq/irqdomain: Add irq_domain::dev for per device MSI domains Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] genirq/irqdomain: Add irq_domain:: Dev " tip-bot2 for Thomas Gleixner
2022-11-24 23:25 ` [patch V3 07/33] genirq/msi: Provide msi_create/free_device_irq_domain() Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-11-24 23:25 ` [patch V3 08/33] genirq/msi: Provide msi_match_device_domain() Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-11-24 23:25 ` [patch V3 09/33] genirq/msi: Add range checking to msi_insert_desc() Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-12-13 19:04   ` [patch V3 09/33] " Guenter Roeck
2022-12-14  9:42     ` Niklas Schnelle
2022-12-15 14:49       ` Thomas Gleixner
2022-12-15 16:23         ` Matthew Rosato
2022-12-15 21:32           ` Guenter Roeck
2022-12-16  9:53           ` Marc Zyngier
2022-12-16 13:50             ` Matthew Rosato
2022-12-16 13:58               ` Marc Zyngier
2022-12-16 14:03                 ` Marc Zyngier
2022-12-16 14:11                   ` Matthew Rosato
2022-12-16 17:30                     ` Marc Zyngier
2022-12-16 15:47                 ` Guenter Roeck
2022-12-17  0:45                 ` Guenter Roeck [this message]
2022-12-17 10:46                   ` Marc Zyngier
2022-12-17 13:36                     ` Guenter Roeck
2023-02-20 17:11   ` [REGRESSION] " Russell King (Oracle)
2023-02-20 18:29     ` Marc Zyngier
2023-02-20 18:43       ` Thomas Gleixner
2023-02-20 19:00       ` Russell King (Oracle)
2023-02-20 19:17       ` Russell King (Oracle)
2023-02-20 19:43         ` Andrew Lunn
2023-02-20 20:15           ` phylib locking (was: Re: [REGRESSION] Re: [patch V3 09/33] genirq/msi: Add range checking) " Russell King (Oracle)
2023-02-21 14:57             ` Russell King (Oracle)
2023-02-20 18:30     ` [REGRESSION] Re: [patch V3 09/33] genirq/msi: Add range checking " Thomas Gleixner
2022-11-24 23:26 ` [patch V3 10/33] PCI/MSI: Split __pci_write_msi_msg() Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 11/33] genirq/msi: Provide BUS_DEVICE_PCI_MSI[X] Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 12/33] PCI/MSI: Add support for per device MSI[X] domains Thomas Gleixner
2022-11-28  4:46   ` Tian, Kevin
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 13/33] x86/apic/vector: Provide MSI parent domain Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2023-01-04 12:34   ` [patch V3 13/33] " Jason Gunthorpe
2023-01-09 20:32     ` Thomas Gleixner
2023-01-10 12:14     ` Thomas Gleixner
2023-01-10 14:59       ` Jason Gunthorpe
2023-01-11 16:02         ` Kalle Valo
2023-01-11 16:35           ` Jason Gunthorpe
2023-01-11 17:07             ` Kalle Valo
2022-11-24 23:26 ` [patch V3 14/33] PCI/MSI: Remove unused pci_dev_has_special_msi_domain() Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 15/33] iommu/vt-d: Switch to MSI parent domains Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 16/33] iommu/amd: Switch to MSI base domains Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 17/33] x86/apic/msi: Remove arch_create_remap_msi_irq_domain() Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 18/33] genirq/msi: Provide struct msi_map Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 19/33] genirq/msi: Provide msi_desc::msi_data Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] genirq/msi: Provide msi_desc:: Msi_data tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 20/33] genirq/msi: Provide msi_domain_ops::prepare_desc() Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] genirq/msi: Provide msi_domain_ops:: Prepare_desc() tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 21/33] genirq/msi: Provide msi_domain_alloc_irq_at() Thomas Gleixner
2022-11-28 14:39   ` Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 22/33] genirq/msi: Provide MSI_FLAG_MSIX_ALLOC_DYN Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 23/33] PCI/MSI: Split MSI-X descriptor setup Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 24/33] PCI/MSI: Provide prepare_desc() MSI domain op Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 25/33] PCI/MSI: Provide post-enable dynamic allocation interfaces for MSI-X Thomas Gleixner
2022-11-24 23:26 ` [patch V3 26/33] x86/apic/msi: Enable MSI_FLAG_PCI_MSIX_ALLOC_DYN Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 27/33] genirq/msi: Provide constants for PCI/IMS support Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 28/33] PCI/MSI: Provide IMS (Interrupt Message Store) support Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2024-03-27 16:32   ` [patch V3 28/33] " Bjorn Helgaas
2024-03-29  1:41     ` Tian, Kevin
2022-11-24 23:26 ` [patch V3 29/33] PCI/MSI: Provide pci_ims_alloc/free_irq() Thomas Gleixner
2022-11-28  4:47   ` Tian, Kevin
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 30/33] x86/apic/msi: Enable PCI/IMS Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 31/33] iommu/vt-d: " Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 32/33] iommu/amd: " Thomas Gleixner
2022-12-05 18:25   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2022-12-05 21:41   ` tip-bot2 for Thomas Gleixner
2022-11-24 23:26 ` [patch V3 33/33] irqchip: Add IDXD Interrupt Message Store driver Thomas Gleixner
2022-11-28  4:50 ` [patch V3 00/33] genirq, PCI/MSI: Support for per device MSI and PCI/IMS - Part 3 implementation Tian, Kevin
2022-12-05 11:07 ` Marc Zyngier

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