Re: [PATCH v3 3/3] spi: s3c64xx: support interrupt based pio mode

From: Marek Szyprowski <m.szyprowski@samsung.com>
To: Jaewon Kim <jaewon02.kim@samsung.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Andi Shyti <andi@etezian.org>, Mark Brown <broonie@kernel.org>,
	Alim Akhtar <alim.akhtar@samsung.com>
Cc: linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	"Chanho Park" <chanho61.park@samsung.com>,
	"Łukasz Stelmach" <l.stelmach@samsung.com>
Subject: Re: [PATCH v3 3/3] spi: s3c64xx: support interrupt based pio mode
Date: Wed, 10 May 2023 08:54:39 +0200	[thread overview]
Message-ID: <7883a9d4-76d0-d259-095b-babae63ffc77@samsung.com> (raw)
In-Reply-To: <0ef75bd7-e7e6-a806-2c3f-35c7312c391d@samsung.com>

On 10.05.2023 06:05, Jaewon Kim wrote:
> Hello Marek
>
>
> On 23. 5. 9. 22:03, Marek Szyprowski wrote:
>> On 02.05.2023 08:28, Jaewon Kim wrote:
>>> Support interrupt based pio mode to optimize cpu usage.
>>> When transmitting data size is larget than 32 bytes, operates with
>>> interrupt based pio mode.
>>>
>>> By using the FIFORDY INT, an interrupt can be triggered when
>>> the desired size of data has been received. Using this, we can support
>>> interrupt based pio mode.
>>>
>>> Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
>> This patch landed recently in linux-next as commit 1ee806718d5e ("spi:
>> s3c64xx: support interrupt based pio mode"). Unfortunately it breaks
>> ethernet chip operation on Exynos3250 based Artik5 Development board. I
>> see the flood of the following messages:
>>
>> [   36.097739] ax88796c spi0.0: I/O Error: rx-1 tx-0 rx-f tx-p len-496
>> dma-1 res-(-5)
>> [   36.100877] ax88796c spi0.0: RX residue: 248
>> [   36.101383] ax88796c spi0.0: SPI transfer failed: -5
>> [   36.101939] spi_master spi0: failed to transfer one message from queue
>> [   36.102439] ax88796c spi0.0: axspi_read_rxq() failed: ret = -5
>> [   36.107830] s3c64xx-spi 13920000.spi: Failed to get RX DMA channel
>> [   36.148875] ax88796c spi0.0: I/O Error: rx-0 tx-1 rx-p tx-f len-4
>> dma-0 res-(-5)
>> [   36.149517] ax88796c spi0.0: SPI transfer failed: -5
>> [   36.150053] spi_master spi0: failed to transfer one message from queue
>> [   36.150562] ax88796c spi0.0: axspi_read_reg() failed: ret = -5
>> [   36.152175] s3c64xx-spi 13920000.spi: Failed to get RX DMA channel
>> [   36.191651] ax88796c spi0.0: I/O Error: rx-0 tx-1 rx-p tx-f len-4
>> dma-0 res-(-5)
>> [   36.192268] ax88796c spi0.0: SPI transfer failed: -5
>>
>> ...
>>
>> I didn't analyze the details, but imho it looks like some kind of
>> mishandling of the corner case or switching between PIO and DMA mode. I
>> will check the details later.
>>
>>
>> Best regards
>
> Thanks for testing the various cases.
>
> The problem occurred when DMA mode and IRQ mode were enabled at the same
> time.
>
>
> In the above case, BUS_WIDTH register invaded.
>
> Because, target length 496 were written to RX_RDY_LVL, but it exceeded
> 6-bits.
>
> Could you test with below code??? If the problem is solved, I will send
> a fix patch as soon as possible.

Thanks for quick response. Indeed, the proposed patch fixed the issue!

Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>

Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>

> -----------------------------
>
> diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
> index 238db29fc93b..a72e11e965c3 100644
> --- a/drivers/spi/spi-s3c64xx.c
> +++ b/drivers/spi/spi-s3c64xx.c
> @@ -782,7 +782,7 @@ static int s3c64xx_spi_transfer_one(struct
> spi_master *master,
>
>           do {
>                   /* transfer size is greater than 32, change to IRQ mode */
> -               if (xfer->len > S3C64XX_SPI_POLLING_SIZE)
> +               if (!use_dma && (xfer->len > S3C64XX_SPI_POLLING_SIZE))

Parentheses around 'xfer->len > S3C64XX_SPI_POLLING_SIZE' are not needed.

>                           use_irq = true;
>
>                   if (use_irq) {
>
> -----------------------------
>
Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland