From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Kandpal, Suraj" <suraj.kandpal@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com>
Subject: RE: [PATCH 2/2] drm/i915/lnl: Program PKGC_LATENCY register
Date: Thu, 08 Feb 2024 10:59:01 +0200 [thread overview]
Message-ID: <874jejcox6.fsf@intel.com> (raw)
In-Reply-To: <SN7PR11MB675090C2560FBDD0C8D50714E3472@SN7PR11MB6750.namprd11.prod.outlook.com>
On Mon, 05 Feb 2024, "Kandpal, Suraj" <suraj.kandpal@intel.com> wrote:
>> On Mon, 05 Feb 2024, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
>> > + if (wm_latency[i] == 0)
>> > + break;
>> > + else if (wm_latency[i] > max_value)
>> > + max_value = wm_latency[i];
>> > + }
>> > +
>> > + if (max_value == 0)
>> > + max_value = ~0 & LNL_PKG_C_LATENCY_MASK;
>>
>> What does "~0 &" gain you here?
>>
>
> So max value is 0 for all bits except 0-12 as we need to set them as all 1's to disable deep pkgc State
How is ~0 & LNL_PKG_C_LATENCY_MASK different from
LNL_PKG_C_LATENCY_MASK?
>> > +
>> > + clear |= LNL_ADDED_WAKE_TIME_MASK |
>> LNL_PKG_C_LATENCY_MASK;
>> > + val |= max_value;
>>
>> If you have fields defined for the register, why not use it for setting max value
>> too?
>
> Sorry I didn't get you here .
val |= REG_FIELD_PREP(LNL_PKG_C_LATENCY_MASK, max_value);
>
>>
>> > + intel_uncore_rmw(&i915->uncore, LNL_PKG_C_LATENCY, clear, val); }
>> > +
>> > static void skl_setup_wm_latency(struct drm_i915_private *i915) {
>> > if (HAS_HW_SAGV_WM(i915))
>> > @@ -3407,6 +3435,9 @@ static void skl_setup_wm_latency(struct
>> drm_i915_private *i915)
>> > skl_read_wm_latency(i915, i915->display.wm.skl_latency);
>> >
>> > intel_print_wm_latency(i915, "Gen9 Plane",
>> > i915->display.wm.skl_latency);
>> > +
>> > + if (DISPLAY_VER(i915) >= 20)
>> > + intel_program_pkgc_latency(i915, i915-
>> >display.wm.skl_latency);
>>
>> Before this, nothing in the skl_wm_init() path actually writes any registers, it's
>> all readout. Is this the right place to be doing this?
>>
>
> Yes since all latency values are all ready and available for use which
> we can program in the deep pkgc register.
Is that a good reason to change a function that only reads hardware to
something writes the hardware?
BR,
Jani.
>
> Regards,
> Suraj Kandpal
>> > }
>> >
>> > static const struct intel_wm_funcs skl_wm_funcs = {
>>
>> --
>> Jani Nikula, Intel
--
Jani Nikula, Intel
next prev parent reply other threads:[~2024-02-08 8:59 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-01 8:51 [PATCH 0/2] Program Deep PKG_C_LATENCY register Suraj Kandpal
2024-02-01 8:51 ` [PATCH 1/2] drm/i915/lnl: Add pkgc related register Suraj Kandpal
2024-02-02 7:37 ` Borah, Chaitanya Kumar
2024-02-07 10:46 ` Govindapillai, Vinod
2024-02-01 8:51 ` [PATCH 2/2] drm/i915/lnl: Program PKGC_LATENCY register Suraj Kandpal
2024-02-05 7:55 ` Borah, Chaitanya Kumar
2024-02-05 8:01 ` Suraj Kandpal
2024-02-05 10:19 ` Jani Nikula
2024-02-05 17:22 ` Kandpal, Suraj
2024-02-08 8:59 ` Jani Nikula [this message]
2024-02-07 11:21 ` Govindapillai, Vinod
2024-02-13 6:28 ` Suraj Kandpal
2024-02-14 10:43 ` Govindapillai, Vinod
2024-02-19 6:36 ` Suraj Kandpal
2024-02-19 9:23 ` Govindapillai, Vinod
2024-02-01 16:36 ` ✗ Fi.CI.SPARSE: warning for Program Deep PKG_C_LATENCY register Patchwork
2024-02-01 19:55 ` ✓ Fi.CI.BAT: success " Patchwork
2024-02-01 21:56 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-02-05 9:47 ` ✗ Fi.CI.SPARSE: warning for Program Deep PKG_C_LATENCY register (rev2) Patchwork
2024-02-05 10:01 ` ✓ Fi.CI.BAT: success " Patchwork
2024-02-05 12:37 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-02-13 7:34 ` ✗ Fi.CI.SPARSE: warning for Program Deep PKG_C_LATENCY register (rev3) Patchwork
2024-02-13 7:48 ` ✓ Fi.CI.BAT: success " Patchwork
2024-02-13 9:25 ` ✓ Fi.CI.IGT: " Patchwork
2024-02-19 7:21 ` ✗ Fi.CI.SPARSE: warning for Program Deep PKG_C_LATENCY register (rev4) Patchwork
2024-02-19 7:34 ` ✓ Fi.CI.BAT: success " Patchwork
2024-02-19 9:19 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-02-20 11:22 ` ✓ Fi.CI.IGT: success " Patchwork
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