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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Alistair Francis <alistair.francis@xilinx.com>
Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org,
	qemu-devel@nongnu.org, crosthwaitepeter@gmail.com,
	edgar.iglesias@gmail.com, afaerber@suse.de,
	fred.konrad@greensocs.com
Subject: Re: [Qemu-devel] [PATCH v5 07/15] register: Add block initialise helper
Date: Tue, 22 Mar 2016 17:11:40 +0000	[thread overview]
Message-ID: <874mbysaib.fsf@linaro.org> (raw)
In-Reply-To: <102a10b5ede9a4c8dc06d2f4f81c57c4e2a71a1c.1457470980.git.alistair.francis@xilinx.com>


Alistair Francis <alistair.francis@xilinx.com> writes:

> From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
>
> Add a helper that will scan a static RegisterAccessInfo Array
> and populate a container MemoryRegion with registers as defined.
>
> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
> ---
> V3:
>  - Fix typo
> V2:
>  - Use memory_region_add_subregion_no_print()
>
>  hw/core/register.c    | 39 +++++++++++++++++++++++++++++++++++++++
>  include/hw/register.h | 20 ++++++++++++++++++++
>  2 files changed, 59 insertions(+)
>
> diff --git a/hw/core/register.c b/hw/core/register.c
> index 28f3776..5db8f62 100644
> --- a/hw/core/register.c
> +++ b/hw/core/register.c
> @@ -228,6 +228,45 @@ uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size)
>      return register_read_memory(opaque, addr, size, false);
>  }
>
> +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae,
> +                           int num, RegisterInfo *ri, uint32_t *data,
> +                           MemoryRegion *container, const MemoryRegionOps *ops,
> +                           bool debug_enabled, uint64_t memory_size)
> +{
> +    const char *device_prefix = object_get_typename(OBJECT(owner));
> +    RegisterInfoArray *r_array = g_malloc(sizeof(RegisterInfoArray));
> +    int i;
> +
> +    r_array->num_elements = 0;
> +    r_array->r = g_malloc_n(num, sizeof(RegisterInfo *));

Don't re-invent the wheel if you don't have to. glib already has an
array type which means your boilerplate becomes:

    GArray *r_array = g_array_sized_new(true, true, sizeof(RegisterInfo *),num);
    for (...) {
        ...create r...
        g_array_append_val(r_array, r);
    }


> +
> +    for (i = 0; i < num; i++) {
> +        int index = rae[i].decode.addr / 4;
> +        RegisterInfo *r = &ri[index];
> +
> +        *r = (RegisterInfo) {
> +            .data = &data[index],
> +            .data_size = sizeof(uint32_t),
> +            .access = &rae[i],
> +            .debug = debug_enabled,
> +            .prefix = device_prefix,
> +            .opaque = owner,
> +        };
> +        register_init(r);
> +
> +        r_array->r[r_array->num_elements] = r;
> +        r_array->num_elements++;
> +    }
> +
> +    r_array->num_elements--;

That's just plain confusing.

> +
> +    memory_region_init_io(&r_array->mem, OBJECT(owner), ops, r_array,
> +                          device_prefix, memory_size);
> +    memory_region_add_subregion(container,
> +                                r_array->r[0]->access->decode.addr,
> +                                &r_array->mem);
> +}
> +
>  static const TypeInfo register_info = {
>      .name  = TYPE_REGISTER,
>      .parent = TYPE_DEVICE,
> diff --git a/include/hw/register.h b/include/hw/register.h
> index d732f55..00df7d5 100644
> --- a/include/hw/register.h
> +++ b/include/hw/register.h
> @@ -176,6 +176,26 @@ void register_write_memory_le(void *opaque, hwaddr addr, uint64_t value,
>  uint64_t register_read_memory_be(void *opaque, hwaddr addr, unsigned size);
>  uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size);
>
> +/**
> + * Init a block of consecutive registers into a container MemoryRegion. A
> + * number of constant register definitions are parsed to create a corresponding
> + * array of RegisterInfo's.
> + *
> + * @owner: device owning the registers
> + * @rae: Register definitions to init
> + * @num: number of registers to init (length of @rae)
> + * @ri: Register array to init
> + * @data: Array to use for register data
> + * @container: Memory region to contain new registers
> + * @ops: Memory region ops to access registers.
> + * @debug enabled: turn on/off verbose debug information
> + */
> +
> +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae,
> +                           int num, RegisterInfo *ri, uint32_t *data,
> +                           MemoryRegion *container, const MemoryRegionOps *ops,
> +                           bool debug_enabled, uint64_t memory_size);
> +
>  /* Define constants for a 32 bit register */
>  #define REG32(reg, addr)                                                  \
>      enum { A_ ## reg = (addr) };                                          \


--
Alex Bennée

  reply	other threads:[~2016-03-22 17:11 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-08 21:06 [Qemu-devel] [PATCH v5 00/15] data-driven device registers Alistair Francis
2016-03-08 21:06 ` [Qemu-devel] [PATCH v5 01/15] bitops: Add MAKE_64BIT_MASK macro Alistair Francis
2016-03-22 15:26   ` Alex Bennée
2016-03-08 21:06 ` [Qemu-devel] [PATCH v5 02/15] register: Add Register API Alistair Francis
2016-03-22 16:28   ` Alex Bennée
2016-03-08 21:06 ` [Qemu-devel] [PATCH v5 03/15] register: Add Memory API glue Alistair Francis
2016-03-22 16:56   ` Alex Bennée
2016-03-24 23:03     ` Alistair Francis
2016-03-08 21:06 ` [Qemu-devel] [PATCH v5 04/15] register: Add support for decoding information Alistair Francis
2016-03-22 17:42   ` Alex Bennée
2016-03-24 23:17     ` Alistair Francis
2016-03-08 21:06 ` [Qemu-devel] [PATCH v5 05/15] register: Define REG and FIELD macros Alistair Francis
2016-03-08 21:06 ` [Qemu-devel] [PATCH v5 06/15] register: QOMify Alistair Francis
2016-03-08 21:06 ` [Qemu-devel] [PATCH v5 07/15] register: Add block initialise helper Alistair Francis
2016-03-22 17:11   ` Alex Bennée [this message]
2016-03-24 23:28     ` Alistair Francis
2016-03-08 21:06 ` [Qemu-devel] [PATCH v5 08/15] dma: Add Xilinx Zynq devcfg device model Alistair Francis
2016-03-08 21:06 ` [Qemu-devel] [PATCH v5 09/15] xilinx_zynq: Connect devcfg to the Zynq machine model Alistair Francis
2016-03-08 21:06 ` [Qemu-devel] [PATCH v5 10/15] qdev: Define qdev_get_gpio_out Alistair Francis
2016-03-08 21:06 ` [Qemu-devel] [PATCH v5 11/15] qdev: Add qdev_pass_all_gpios API Alistair Francis
2016-03-08 21:06 ` [Qemu-devel] [PATCH v5 12/15] irq: Add opaque setter routine Alistair Francis
2016-03-08 21:07 ` [Qemu-devel] [PATCH v5 13/15] register: Add GPIO API Alistair Francis
2016-03-08 21:07 ` [Qemu-devel] [PATCH v5 14/15] misc: Introduce ZynqMP IOU SLCR Alistair Francis
2016-03-22 17:44 ` [Qemu-devel] [PATCH v5 00/15] data-driven device registers Alex Bennée
2016-03-24 23:43   ` Alistair Francis

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