Re: [PATCH V2] OMAP3: PM: Workaround for DPLL3 Lock issue

From: Kevin Hilman <khilman@deeprootsystems.com>
To: "Sripathy, Vishwanath" <vishwanath.bs@ti.com>
Cc: "Gulati, Shweta" <shweta.gulati@ti.com>,
	"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>
Subject: Re: [PATCH V2] OMAP3: PM: Workaround for DPLL3 Lock issue
Date: Tue, 18 May 2010 09:36:35 -0700	[thread overview]
Message-ID: <87hbm5qi98.fsf@deeprootsystems.com> (raw)
In-Reply-To: <FCCFB4CDC6E5564B9182F639FC35608703051ADC7D@dbde02.ent.ti.com> (Vishwanath Sripathy's message of "Tue\, 18 May 2010 21\:10\:27 +0530")

"Sripathy, Vishwanath" <vishwanath.bs@ti.com> writes:

>> All that being said, why is the voltage level being programmed here?
>> 
>> It seems to me that all of this errata handling should be
>> self-contained in the voltage layer.
>
> I am not sure if entire errata can be contained in voltage
> layer. This is because we are performing DVFS operation in CPU Idle
> path which involves both Frequency and Voltage scaling. So currently
> this has been done in resource34xx.c where DVFS is implemented.

What I mean is that there seems to be no good reason to be calling
these from pm34xx.c, they should be called where voltage scaling is
done.

Kevin