From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
Geert Uytterhoeven <geert.uytterhoeven@gmail.com>,
Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
linux-gpio@vger.kernel.org
Subject: [PATCH v4 15/23] pinctrl: renesas: r8a779g0: add missing SCIF3
Date: Fri, 1 Jul 2022 01:39:44 +0000 [thread overview]
Message-ID: <87v8shsja7.wl-kuninori.morimoto.gx@renesas.com> (raw)
In-Reply-To: <87h741ty20.wl-kuninori.morimoto.gx@renesas.com>
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
V4H has SCIF3 and SCIF3_A, but current PFC setting is mixed.
This patch cleanup SCIF3/SCIF3_A, based on Rev.0.51.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
drivers/pinctrl/renesas/pfc-r8a779g0.c | 71 +++++++++++++++++++-------
1 file changed, 53 insertions(+), 18 deletions(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c
index 8661cd5a2a38..114b558d75b7 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
@@ -296,11 +296,11 @@
/* SR1 */
/* IP0SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
-#define IP0SR1_3_0 FM(MSIOF1_SS2) FM(HTX3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_7_4 FM(MSIOF1_SS1) FM(HCTS3_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_11_8 FM(MSIOF1_SYNC) FM(HRTS3_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_15_12 FM(MSIOF1_SCK) FM(HSCK3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP0SR1_19_16 FM(MSIOF1_TXD) FM(HRX3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_3_0 FM(MSIOF1_SS2) FM(HTX3_A) FM(TX3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_7_4 FM(MSIOF1_SS1) FM(HCTS3_N_A) FM(RX3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_11_8 FM(MSIOF1_SYNC) FM(HRTS3_N_A) FM(RTS3_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_15_12 FM(MSIOF1_SCK) FM(HSCK3_A) FM(CTS3_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP0SR1_19_16 FM(MSIOF1_TXD) FM(HRX3_A) FM(SCK3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR1_23_20 FM(MSIOF1_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR1_27_24 FM(MSIOF0_SS2) FM(HTX1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP0SR1_31_28 FM(MSIOF0_SS1) FM(HRX1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
@@ -326,11 +326,11 @@
#define IP2SR1_31_28 F_(0, 0) FM(TCLK2) FM(MSIOF4_SS1) FM(IRQ3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* IP3SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
-#define IP3SR1_3_0 FM(HRX3) FM(SCK3) FM(MSIOF4_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP3SR1_7_4 FM(HSCK3) FM(CTS3_N) FM(MSIOF4_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP3SR1_11_8 FM(HRTS3_N) FM(RTS3_N) FM(MSIOF4_TXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP3SR1_15_12 FM(HCTS3_N) FM(RX3) FM(MSIOF4_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
-#define IP3SR1_19_16 FM(HTX3) FM(TX3) FM(MSIOF4_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP3SR1_3_0 FM(HRX3) FM(SCK3_A) FM(MSIOF4_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP3SR1_7_4 FM(HSCK3) FM(CTS3_N_A) FM(MSIOF4_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP3SR1_11_8 FM(HRTS3_N) FM(RTS3_N_A) FM(MSIOF4_TXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP3SR1_15_12 FM(HCTS3_N) FM(RX3_A) FM(MSIOF4_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
+#define IP3SR1_19_16 FM(HTX3) FM(TX3_A) FM(MSIOF4_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
/* SR2 */
/* IP0SR2 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */
@@ -796,18 +796,23 @@ static const u16 pinmux_data[] = {
/* IP0SR1 */
PINMUX_IPSR_GPSR(IP0SR1_3_0, MSIOF1_SS2),
PINMUX_IPSR_GPSR(IP0SR1_3_0, HTX3_A),
+ PINMUX_IPSR_GPSR(IP0SR1_3_0, TX3),
PINMUX_IPSR_GPSR(IP0SR1_7_4, MSIOF1_SS1),
PINMUX_IPSR_GPSR(IP0SR1_7_4, HCTS3_N_A),
+ PINMUX_IPSR_GPSR(IP0SR1_7_4, RX3),
PINMUX_IPSR_GPSR(IP0SR1_11_8, MSIOF1_SYNC),
PINMUX_IPSR_GPSR(IP0SR1_11_8, HRTS3_N_A),
+ PINMUX_IPSR_GPSR(IP0SR1_11_8, RTS3_N),
PINMUX_IPSR_GPSR(IP0SR1_15_12, MSIOF1_SCK),
PINMUX_IPSR_GPSR(IP0SR1_15_12, HSCK3_A),
+ PINMUX_IPSR_GPSR(IP0SR1_15_12, CTS3_N),
PINMUX_IPSR_GPSR(IP0SR1_19_16, MSIOF1_TXD),
PINMUX_IPSR_GPSR(IP0SR1_19_16, HRX3_A),
+ PINMUX_IPSR_GPSR(IP0SR1_19_16, SCK3),
PINMUX_IPSR_GPSR(IP0SR1_23_20, MSIOF1_RXD),
@@ -872,23 +877,23 @@ static const u16 pinmux_data[] = {
/* IP3SR1 */
PINMUX_IPSR_GPSR(IP3SR1_3_0, HRX3),
- PINMUX_IPSR_GPSR(IP3SR1_3_0, SCK3),
+ PINMUX_IPSR_GPSR(IP3SR1_3_0, SCK3_A),
PINMUX_IPSR_GPSR(IP3SR1_3_0, MSIOF4_SS2),
PINMUX_IPSR_GPSR(IP3SR1_7_4, HSCK3),
- PINMUX_IPSR_GPSR(IP3SR1_7_4, CTS3_N),
+ PINMUX_IPSR_GPSR(IP3SR1_7_4, CTS3_N_A),
PINMUX_IPSR_GPSR(IP3SR1_7_4, MSIOF4_SCK),
PINMUX_IPSR_GPSR(IP3SR1_11_8, HRTS3_N),
- PINMUX_IPSR_GPSR(IP3SR1_11_8, RTS3_N),
+ PINMUX_IPSR_GPSR(IP3SR1_11_8, RTS3_N_A),
PINMUX_IPSR_GPSR(IP3SR1_11_8, MSIOF4_TXD),
PINMUX_IPSR_GPSR(IP3SR1_15_12, HCTS3_N),
- PINMUX_IPSR_GPSR(IP3SR1_15_12, RX3),
+ PINMUX_IPSR_GPSR(IP3SR1_15_12, RX3_A),
PINMUX_IPSR_GPSR(IP3SR1_15_12, MSIOF4_RXD),
PINMUX_IPSR_GPSR(IP3SR1_19_16, HTX3),
- PINMUX_IPSR_GPSR(IP3SR1_19_16, TX3),
+ PINMUX_IPSR_GPSR(IP3SR1_19_16, TX3_A),
PINMUX_IPSR_GPSR(IP3SR1_19_16, MSIOF4_SYNC),
/* IP0SR2 */
@@ -2199,6 +2204,29 @@ static const unsigned int scif3_ctrl_mux[] = {
RTS3_N_MARK, CTS3_N_MARK,
};
+/* - SCIF3_A ------------------------------------------------------------------ */
+static const unsigned int scif3_data_a_pins[] = {
+ /* RX3_A, TX3_A */
+ RCAR_GP_PIN(1, 27), RCAR_GP_PIN(1, 28),
+};
+static const unsigned int scif3_data_a_mux[] = {
+ RX3_A_MARK, TX3_A_MARK,
+};
+static const unsigned int scif3_clk_a_pins[] = {
+ /* SCK3_A */
+ RCAR_GP_PIN(1, 24),
+};
+static const unsigned int scif3_clk_a_mux[] = {
+ SCK3_A_MARK,
+};
+static const unsigned int scif3_ctrl_a_pins[] = {
+ /* RTS3_N_A, CTS3_N_A */
+ RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25),
+};
+static const unsigned int scif3_ctrl_a_mux[] = {
+ RTS3_N_A_MARK, CTS3_N_A_MARK,
+};
+
/* - SCIF4 ------------------------------------------------------------------ */
static const unsigned int scif4_data_pins[] = {
/* RX4, TX4 */
@@ -2476,9 +2504,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(scif1_data),
SH_PFC_PIN_GROUP(scif1_clk),
SH_PFC_PIN_GROUP(scif1_ctrl),
- SH_PFC_PIN_GROUP(scif3_data),
- SH_PFC_PIN_GROUP(scif3_clk),
- SH_PFC_PIN_GROUP(scif3_ctrl),
+ SH_PFC_PIN_GROUP(scif3_data), /* suffix might be updated */
+ SH_PFC_PIN_GROUP(scif3_data_a), /* suffix might be updated */
+ SH_PFC_PIN_GROUP(scif3_clk), /* suffix might be updated */
+ SH_PFC_PIN_GROUP(scif3_clk_a), /* suffix might be updated */
+ SH_PFC_PIN_GROUP(scif3_ctrl), /* suffix might be updated */
+ SH_PFC_PIN_GROUP(scif3_ctrl_a), /* suffix might be updated */
SH_PFC_PIN_GROUP(scif4_data),
SH_PFC_PIN_GROUP(scif4_clk),
SH_PFC_PIN_GROUP(scif4_ctrl),
@@ -2761,9 +2792,13 @@ static const char * const scif1_groups[] = {
};
static const char * const scif3_groups[] = {
+ /* suffix might be updated */
"scif3_data",
+ "scif3_data_a",
"scif3_clk",
+ "scif3_clk_a",
"scif3_ctrl",
+ "scif3_ctrl_a",
};
static const char * const scif4_groups[] = {
--
2.25.1
next prev parent reply other threads:[~2022-07-01 1:39 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-01 1:35 [PATCH v4 00/21] pinctrl: renesas: r8a779g0: Add pins, groups and functions Kuninori Morimoto
2022-07-01 1:35 ` [PATCH v4 01/23] dt-bindings: pinctrl: renesas,pfc: Document r8a779g0 support Kuninori Morimoto
2022-07-04 15:40 ` Geert Uytterhoeven
2022-07-01 1:36 ` [PATCH v4 02/23] pinctrl: renesas: Add PORT_GP_CFG_13 macros Kuninori Morimoto
2022-07-04 15:40 ` Geert Uytterhoeven
2022-07-01 1:36 ` [PATCH v4 03/23] pinctrl: renesas: Initial R8A779G0 (V4H) PFC support Kuninori Morimoto
2022-07-04 15:41 ` Geert Uytterhoeven
2022-07-01 1:36 ` [PATCH v4 04/23] pinctrl: renesas: r8a779g0: Add pins, groups and functions Kuninori Morimoto
2022-07-04 15:42 ` Geert Uytterhoeven
2022-07-01 1:36 ` [PATCH v4 05/23] pinctrl: renesas: r8a779g0: fixup MODSEL8 Kuninori Morimoto
2022-07-04 15:42 ` Geert Uytterhoeven
2022-07-01 1:36 ` [PATCH v4 06/23] pinctrl: renesas: r8a779g0: remove not used NOGP definitions Kuninori Morimoto
2022-07-04 15:42 ` Geert Uytterhoeven
2022-07-01 1:37 ` [PATCH v4 07/23] pinctrl: renesas: r8a779g0: remove not used IPxSRx definitions Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:37 ` [PATCH v4 08/23] pinctrl: renesas: r8a779g0: remove not used MOD_SELx definitions Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:37 ` [PATCH v4 09/23] pinctrl: renesas: r8a779g0: tidyup ioctrl_regs Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:38 ` [PATCH v4 10/23] pinctrl: renesas: r8a779g0: tidyup POC1 voltage Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:39 ` [PATCH v4 11/23] pinctrl: renesas: r8a779g0: add missing TCLKx_A/TCLK_B/TCLKx_X Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:39 ` [PATCH v4 12/23] pinctrl: renesas: r8a779g0: add missing IRQx_A/IRQx_B Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:39 ` [PATCH v4 13/23] pinctrl: renesas: r8a779g0: add missing HSCIF3_A Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:39 ` [PATCH v4 14/23] pinctrl: renesas: r8a779g0: add missing HSCIF1_X Kuninori Morimoto
2022-07-04 15:43 ` Geert Uytterhoeven
2022-07-01 1:39 ` Kuninori Morimoto [this message]
2022-07-04 15:44 ` [PATCH v4 15/23] pinctrl: renesas: r8a779g0: add missing SCIF3 Geert Uytterhoeven
2022-07-01 1:39 ` [PATCH v4 16/23] pinctrl: renesas: r8a779g0: add missing SCIF1_X Kuninori Morimoto
2022-07-04 15:44 ` Geert Uytterhoeven
2022-07-01 1:39 ` [PATCH v4 17/23] pinctrl: renesas: r8a779g0: add missing CANFD5_B Kuninori Morimoto
2022-07-04 15:44 ` Geert Uytterhoeven
2022-07-01 1:40 ` [PATCH v4 18/23] pinctrl: renesas: r8a779g0: add missing TPU0TOx_A Kuninori Morimoto
2022-07-04 15:44 ` Geert Uytterhoeven
2022-07-01 1:40 ` [PATCH v4 19/23] pinctrl: renesas: r8a779g0: add missing FlexRay Kuninori Morimoto
2022-07-04 15:44 ` Geert Uytterhoeven
2022-07-01 1:40 ` [PATCH v4 20/23] pinctrl: renesas: r8a779g0: add missing PWM Kuninori Morimoto
2022-07-04 15:44 ` Geert Uytterhoeven
2022-07-01 1:40 ` [PATCH v4 21/23] pinctrl: renesas: r8a779g0: add missing ERROROUTC_A Kuninori Morimoto
2022-07-04 15:45 ` Geert Uytterhoeven
2022-07-01 1:40 ` [PATCH v4 22/23] pinctrl: renesas: r8a779g0: add missing MODSELx for TSN0 Kuninori Morimoto
2022-07-04 15:45 ` Geert Uytterhoeven
2022-07-01 1:41 ` [PATCH v4 23/23] pinctrl: renesas: r8a779g0: add missing MODSELx for AVBx Kuninori Morimoto
2022-07-04 15:45 ` Geert Uytterhoeven
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