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From: Thomas Gleixner <tglx@linutronix.de>
To: Reinette Chatre <reinette.chatre@intel.com>,
	LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Joerg Roedel <joro@8bytes.org>,
	Will Deacon <will@kernel.org>,
	linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jason Gunthorpe <jgg@mellanox.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Alex Williamson <alex.williamson@redhat.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Logan Gunthorpe <logang@deltatee.com>,
	Ashok Raj <ashok.raj@intel.com>, Jon Mason <jdmason@kudzu.us>,
	Allen Hubbe <allenbh@gmail.com>,
	"Ahmed S. Darwish" <darwi@linutronix.de>
Subject: Re: [patch 21/33] genirq/msi: Provide msi_domain_alloc_irq_at()
Date: Fri, 18 Nov 2022 10:15:33 +0100	[thread overview]
Message-ID: <87zgcok4i2.ffs@tglx> (raw)
In-Reply-To: <87k03tkrii.ffs@tglx>

On Fri, Nov 18 2022 at 01:58, Thomas Gleixner wrote:
> On Thu, Nov 17 2022 at 15:33, Reinette Chatre wrote:
>> When calling pci_ims_alloc_irq(), msi_insert_desc() ends up being
>> called twice, first with index = MSI_ANY_INDEX, second with index = 0.
>> (domid = 1 both times)
>
> How so?
>
>>>  	}
>>>  
>>>  	hwsize = msi_domain_get_hwsize(dev, domid);
>>> -	if (index >= hwsize) {
>>> -		ret = -ERANGE;
>>> -		goto fail;
>>> -	}
>>>  
>>> -	desc->msi_index = index;
>>> -	index += baseidx;
>>> -	ret = xa_insert(&md->__store, index, desc, GFP_KERNEL);
>>> -	if (ret)
>>> -		goto fail;
>>> -	return 0;
>>> +	if (index == MSI_ANY_INDEX) {
>>> +		struct xa_limit limit;
>>> +		unsigned int index;
>>> +
>>> +		limit.min = baseidx;
>>> +		limit.max = baseidx + hwsize - 1;
>>>  
>>> +		/* Let the xarray allocate a free index within the limits */
>>> +		ret = xa_alloc(&md->__store, &index, desc, limit, GFP_KERNEL);
>>> +		if (ret)
>>> +			goto fail;
>>> +
>>
>> This path (index == MSI_ANY_INDEX) is followed when msi_insert_desc()
>> is called the first time and the xa_alloc() succeeds at index 65536.
>>
>>> +		desc->msi_index = index;
>>
>> This is problematic with desc->msi_index being a u16, assigning
>> 65536 to it becomes 0.
>
> You are partially right. I need to fix that and make it explicit as it's
> a "works by chance or maybe not" construct right now.
>
> But desc->msi_index is correct to be truncated because it's the index
> within the domain space which is zero based.

It should obviously do:

   desc->msi_index = index - baseidx;

>>> +		return 0;
>>> +	} else {
>>> +		if (index >= hwsize) {
>>> +			ret = -ERANGE;
>>> +			goto fail;
>>> +		}
>>> +
>>> +		desc->msi_index = index;
>>> +		index += baseidx;
>>> +		ret = xa_insert(&md->__store, index, desc, GFP_KERNEL);
>>> +		if (ret)
>>> +			goto fail;
>>
>> This "else" path is followed when msi_insert_desc() is called the second
>> time with "index = 0". The xa_insert() above fails at index 65536
>> (baseidx = 65536) with -EBUSY, trickling up as the return code to
>> pci_ims_alloc_irq().
>
> Why is it called with index=0 the second time?
>>> +	desc = msi_alloc_desc(dev, 1, affdesc);
>>> +	if (!desc) {
>>> +		map.index = -ENOMEM;
>>> +		goto unlock;
>>> +	}
>>> +
>>> +	if (cookie)
>>> +		desc->data.cookie = *cookie;
>>> +
>>> +	ret = msi_insert_desc(dev, desc, domid, index);
>>> +	if (ret) {
>>> +		map.index = ret;
>>> +		goto unlock;
>>> +	}
>>
>> Above is the first call to msi_insert_desc(/* index = MSI_ANY_INDEX */)
>>
>>> +
>>> +	map.index = desc->msi_index;
>>
>> msi_insert_desc() did attempt to set desc->msi_index to 65536 but map.index ends
>> up being 0.
>
> which is kinda correct.
>
>>> +	ret = msi_domain_alloc_irqs_range_locked(dev, domid, map.index, map.index);
>>
>> Here is where the second call to msi_insert_desc() originates:
>>
>> msi_domain_alloc_irqs_range_locked() -> msi_domain_alloc_locked() -> \
>> __msi_domain_alloc_locked() -> msi_domain_alloc_simple_msi_descs() -> \
>> msi_domain_add_simple_msi_descs() -> msi_insert_desc()
>
> but yes, that's bogus because it tries to allocate what is allocated already.
>
> Too tired to decode this circular dependency right now. Will stare at it
> with brain awake in the morning. Duh!

Duh. I'm a moron.

Of course I "tested" this by flipping default and secondary domain
around and doing dynamic allocations from PCI/MSI-X but that won't catch
the bug because PCI/MSI-X does not have the ALLOC_SIMPLE_DESCS flag set.

Let me fix that.

Thanks,

        tglx

  reply	other threads:[~2022-11-18  9:15 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-11 13:58 [patch 00/33] genirq, PCI/MSI: Support for per device MSI and PCI/IMS - Part 3 implementation Thomas Gleixner
2022-11-11 13:58 ` [patch 01/33] genirq/msi: Rearrange MSI domain flags Thomas Gleixner
2022-11-16 18:41   ` Jason Gunthorpe
2022-11-11 13:58 ` [patch 02/33] genirq/msi: Provide struct msi_parent_ops Thomas Gleixner
2022-11-16 18:57   ` Jason Gunthorpe
2022-11-17 15:58     ` Thomas Gleixner
2022-11-18 13:52       ` Thomas Gleixner
2022-11-11 13:58 ` [patch 03/33] genirq/msi: Provide data structs for per device domains Thomas Gleixner
2022-11-11 13:58 ` [patch 04/33] genirq/msi: Add size info to struct msi_domain_info Thomas Gleixner
2022-11-11 13:58 ` [patch 05/33] genirq/msi: Split msi_create_irq_domain() Thomas Gleixner
2022-11-11 13:58 ` [patch 06/33] genirq/irqdomain: Add irq_domain::dev for per device MSI domains Thomas Gleixner
2022-11-11 13:58 ` [patch 07/33] genirq/msi: Provide msi_create/free_device_irq_domain() Thomas Gleixner
2022-11-11 13:58 ` [patch 08/33] genirq/msi: Provide msi_match_device_domain() Thomas Gleixner
2022-11-11 13:58 ` [patch 09/33] genirq/msi: Add range checking to msi_insert_desc() Thomas Gleixner
2022-11-11 13:58 ` [patch 10/33] PCI/MSI: Split __pci_write_msi_msg() Thomas Gleixner
2022-11-16 20:10   ` Bjorn Helgaas
2022-11-11 13:58 ` [patch 11/33] genirq/msi: Provide BUS_DEVICE_PCI_MSI[X] Thomas Gleixner
2022-11-11 13:58 ` [patch 12/33] PCI/MSI: Add support for per device MSI[X] domains Thomas Gleixner
2022-11-16 19:13   ` Jason Gunthorpe
2022-11-16 22:38     ` Thomas Gleixner
2022-11-17  0:22       ` Jason Gunthorpe
2022-11-17  8:45         ` Thomas Gleixner
2022-11-16 20:22   ` Bjorn Helgaas
2022-11-11 13:58 ` [patch 13/33] x86/apic/vector: Provide MSI parent domain Thomas Gleixner
2022-11-16 19:18   ` Jason Gunthorpe
2022-11-17 20:06     ` Thomas Gleixner
2022-11-11 13:58 ` [patch 14/33] PCI/MSI: Remove unused pci_dev_has_special_msi_domain() Thomas Gleixner
2022-11-16 20:13   ` Bjorn Helgaas
2022-11-11 13:58 ` [patch 15/33] iommu/vt-d: Switch to MSI parent domains Thomas Gleixner
2022-11-11 13:58 ` [patch 16/33] iommu/amd: Switch to MSI base domains Thomas Gleixner
2022-11-11 13:58 ` [patch 17/33] x86/apic/msi: Remove arch_create_remap_msi_irq_domain() Thomas Gleixner
2022-11-11 13:58 ` [patch 18/33] genirq/msi: Provide struct msi_map Thomas Gleixner
2022-11-11 13:58 ` [patch 19/33] genirq/msi: Provide msi_desc::msi_data Thomas Gleixner
2022-11-16 19:28   ` Jason Gunthorpe
2022-11-17  8:48     ` Thomas Gleixner
2022-11-17 13:33       ` Jason Gunthorpe
2022-11-18 22:08     ` Thomas Gleixner
2022-11-21 17:20       ` Jason Gunthorpe
2022-11-21 19:40         ` Thomas Gleixner
2022-11-22  1:52           ` Jason Gunthorpe
2022-11-22 20:49             ` Thomas Gleixner
2022-11-23 16:58               ` Jason Gunthorpe
2022-11-23 18:38                 ` Thomas Gleixner
2022-12-01 12:24                   ` Thomas Gleixner
2022-12-02  0:35                     ` Jason Gunthorpe
2022-12-02  2:14                       ` Thomas Gleixner
2022-11-11 13:58 ` [patch 20/33] genirq/msi: Provide msi_domain_ops::prepare_desc() Thomas Gleixner
2022-11-11 13:58 ` [patch 21/33] genirq/msi: Provide msi_domain_alloc_irq_at() Thomas Gleixner
2022-11-16 19:36   ` Jason Gunthorpe
2022-11-17  9:40     ` Thomas Gleixner
2022-11-17 23:33   ` Reinette Chatre
2022-11-18  0:58     ` Thomas Gleixner
2022-11-18  9:15       ` Thomas Gleixner [this message]
2022-11-18 11:05         ` Thomas Gleixner
2022-11-18 18:18           ` Reinette Chatre
2022-11-18 22:31             ` Thomas Gleixner
2022-11-18 22:59               ` Reinette Chatre
2022-11-19  0:19                 ` Reinette Chatre
2022-11-11 13:58 ` [patch 22/33] genirq/msi: Provide MSI_FLAG_MSIX_ALLOC_DYN Thomas Gleixner
2022-11-16 19:36   ` Jason Gunthorpe
2022-11-11 13:58 ` [patch 23/33] PCI/MSI: Split MSIX descriptor setup Thomas Gleixner
2022-11-16 20:13   ` Bjorn Helgaas
2022-11-11 13:58 ` [patch 24/33] PCI/MSI: Provide prepare_desc() MSI domain op Thomas Gleixner
2022-11-16 19:40   ` Jason Gunthorpe
2022-11-16 20:26   ` Bjorn Helgaas
2022-11-16 22:42     ` Thomas Gleixner
2022-11-11 13:58 ` [patch 25/33] PCI/MSI: Provide post-enable dynamic allocation interfaces for MSI-X Thomas Gleixner
2022-11-16 20:19   ` Bjorn Helgaas
2022-11-16 22:43     ` Thomas Gleixner
2022-11-11 13:58 ` [patch 26/33] x86/apic/msi: Enable MSI_FLAG_PCI_MSIX_ALLOC_DYN Thomas Gleixner
2022-11-11 13:58 ` [patch 27/33] genirq/msi: Provide constants for PCI/IMS support Thomas Gleixner
2022-11-16 19:54   ` Jason Gunthorpe
2022-11-17  9:46     ` Thomas Gleixner
2022-11-11 13:58 ` [patch 28/33] PCI/MSI: Provide IMS (Interrupt Message Store) support Thomas Gleixner
2022-11-16 20:17   ` Bjorn Helgaas
2022-11-11 13:58 ` [patch 29/33] PCI/MSI: Provide pci_ims_alloc/free_irq() Thomas Gleixner
2022-11-16 20:14   ` Bjorn Helgaas
2022-11-11 13:58 ` [patch 30/33] x86/apic/msi: Enable PCI/IMS Thomas Gleixner
2022-11-11 13:59 ` [patch 31/33] iommu/vt-d: " Thomas Gleixner
2022-11-11 13:59 ` [patch 32/33] iommu/amd: " Thomas Gleixner
2022-11-11 13:59 ` [patch 33/33] irqchip: Add IDXD Interrupt Message Store driver Thomas Gleixner
2022-12-02 17:55   ` Reinette Chatre
2022-12-02 19:51     ` Thomas Gleixner
2022-12-02 21:16       ` Reinette Chatre
2022-12-05 15:20       ` Thomas Gleixner
2022-12-05 17:19         ` Reinette Chatre

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