From: Greentime Hu <greentime.hu@sifive.com>
To: greentime.hu@sifive.com, oleg@redhat.com,
guoren@linux.alibaba.com, vincent.chen@sifive.com,
paul.walmsley@sifive.com, palmerdabbelt@google.com,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 01/13] ptrace: Use regset_size() for dynamic regset
Date: Fri, 12 Jun 2020 15:09:50 +0800 [thread overview]
Message-ID: <8dbfdc77d4fac81a113ae2572ff9d01d9f155bfb.1591344965.git.greentime.hu@sifive.com> (raw)
In-Reply-To: <cover.1591344965.git.greentime.hu@sifive.com>
This patch uses regset_size() instead of using regset->n and regset->size
directly. In this case, it will call the get_size() ported by arch
dynamically to support dynamic regset size case.
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Acked-by: Oleg Nesterov <oleg@redhat.com>
---
kernel/ptrace.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/ptrace.c b/kernel/ptrace.c
index 43d6179508d6..946b2c4ec4fa 100644
--- a/kernel/ptrace.c
+++ b/kernel/ptrace.c
@@ -888,7 +888,7 @@ static int ptrace_regset(struct task_struct *task, int req, unsigned int type,
regset_no = regset - view->regsets;
kiov->iov_len = min(kiov->iov_len,
- (__kernel_size_t) (regset->n * regset->size));
+ (__kernel_size_t) regset_size(task, regset));
if (req == PTRACE_GETREGSET)
return copy_regset_to_user(task, view, regset_no, 0,
--
2.27.0
next prev parent reply other threads:[~2020-06-12 7:10 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-12 7:09 [PATCH v6 00/13] riscv: Add vector ISA support Greentime Hu
2020-06-12 7:09 ` Greentime Hu [this message]
2020-06-12 7:09 ` [PATCH 02/13] riscv: Separate patch for cflags and aflags Greentime Hu
2020-06-12 7:09 ` [PATCH 03/13] riscv: Rename __switch_to_aux -> fpu Greentime Hu
2020-06-12 7:09 ` [PATCH 04/13] riscv: Extending cpufeature.c to detect V-extension Greentime Hu
2020-06-12 7:09 ` [PATCH 05/13] riscv: Add new csr defines related to vector extension Greentime Hu
2020-06-12 7:09 ` [PATCH 06/13] riscv: Add vector feature to compile Greentime Hu
2020-06-12 7:09 ` [PATCH 07/13] riscv: Add has_vector/riscv_vsize to save vector features Greentime Hu
2020-06-12 7:09 ` [PATCH 08/13] riscv: Reset vector register Greentime Hu
2020-06-12 7:09 ` [PATCH 09/13] riscv: Add vector struct and assembler definitions Greentime Hu
2020-06-12 7:09 ` [PATCH 10/13] riscv: Add task switch support for vector Greentime Hu
2020-06-12 7:10 ` [PATCH 11/13] riscv: Add ptrace vector support Greentime Hu
2020-06-12 7:10 ` [PATCH 12/13] riscv: Add sigcontext save/restore for vector Greentime Hu
2020-06-12 7:10 ` [PATCH 13/13] riscv: signal: Report signal frame size to userspace via auxv Greentime Hu
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