From: Marek Szyprowski <m.szyprowski@samsung.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-usb@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
linux-kernel@vger.kernel.org,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Mathias Nyman <mathias.nyman@intel.com>,
Felipe Balbi <balbi@kernel.org>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Jochen Sprickerhof <jochen@sprickerhof.de>,
Anand Moon <linux.amoon@gmail.com>
Subject: Re: [PATCH v2 1/2 RESEND] usb: core: phy: add support for PHY calibration
Date: Thu, 29 Aug 2019 12:27:34 +0200 [thread overview]
Message-ID: <91b0a341-e561-43f5-3daa-c6aaf33e3287@samsung.com> (raw)
In-Reply-To: <20190829102113.GA20823@kroah.com>
Hi Greg,
On 2019-08-29 12:21, Greg Kroah-Hartman wrote:
> On Thu, Aug 29, 2019 at 07:26:50AM +0200, Marek Szyprowski wrote:
>> Hi Greg,
>>
>> On 2019-08-28 22:41, Greg Kroah-Hartman wrote:
>>> On Mon, Aug 26, 2019 at 10:55:33AM +0200, Marek Szyprowski wrote:
>>>> Hi Greg
>>>>
>>>> On 2019-08-08 11:41, Marek Szyprowski wrote:
>>>>> Some PHYs (for example Exynos5 USB3.0 DRD PHY) require calibration to be
>>>>> done after every USB HCD reset. Generic PHY framework has been already
>>>>> extended with phy_calibrate() function in commit 36914111e682 ("drivers:
>>>>> phy: add calibrate method"). This patch adds support for it to generic
>>>>> PHY handling code in USB HCD core.
>>>>>
>>>>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
>>>>> Tested-by: Anand Moon <linux.amoon@gmail.com>
>>>>> Tested-by: Jochen Sprickerhof <jochen@sprickerhof.de>
>>>> Greg: any chance to give it this a try in -next? If not, maybe You can
>>>> point someone whose review will help?
>>> Ah crap, this is me, not the PHY maintainer :(
>>>
>>> Can you resend this and I will be glad to review it. But it would also
>>> be good to get Felipe's review as well.
>> No problem, I will resend it again in a few minutes. Felipe already
>> acked it: https://lkml.org/lkml/2019/8/8/460
> I don't see the resend, did I miss it?
I looks so: https://lkml.org/lkml/2019/8/29/31
> And can you add Felipe's ack to it?
Yes, I've already did that.
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
next prev parent reply other threads:[~2019-08-29 10:27 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20190808094145eucas1p25ffe4aa863d49a4841e9facd2c61d04b@eucas1p2.samsung.com>
2019-08-08 9:41 ` [PATCH v2 0/2 RESEND] Fix USB3.0 DRD PHY calibration issues (DWC3/XHCI) on Exynos542x SoCs Marek Szyprowski
[not found] ` <CGME20190808094146eucas1p2a5a88ce5e7a87d47c4bcececab4df9a5@eucas1p2.samsung.com>
2019-08-08 9:41 ` [PATCH v2 1/2 RESEND] usb: core: phy: add support for PHY calibration Marek Szyprowski
2019-08-26 8:55 ` Marek Szyprowski
2019-08-28 20:41 ` Greg Kroah-Hartman
2019-08-29 5:26 ` Marek Szyprowski
2019-08-29 10:21 ` Greg Kroah-Hartman
2019-08-29 10:27 ` Marek Szyprowski [this message]
2019-08-29 11:22 ` Greg Kroah-Hartman
[not found] ` <CGME20190808094146eucas1p27c673846a5a9be0c55f1f87c89af4adf@eucas1p2.samsung.com>
2019-08-08 9:41 ` [PATCH v2 2/2 RESEND] usb: dwc3: remove generic PHY calibrate() calls Marek Szyprowski
2019-08-08 9:51 ` Felipe Balbi
2019-08-08 9:51 ` Felipe Balbi
2019-08-08 10:38 ` Marek Szyprowski
2019-08-08 12:37 ` Felipe Balbi
2019-08-29 5:30 [PATCH v2 0/2 2nd RESEND] Fix USB3.0 DRD PHY calibration issues (DWC3/XHCI) on Exynos542x SoCs Marek Szyprowski
[not found] ` <CGME20190829053048eucas1p1f6549a72d7374812b2aa3cf93862794e@eucas1p1.samsung.com>
2019-08-29 5:30 ` [PATCH v2 1/2 RESEND] usb: core: phy: add support for PHY calibration Marek Szyprowski
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