Re: [PATCH intel-gpu-tools] tools: Added intel_dpio_read and intel_dpio_write

From: Ben Widawsky <ben@bwidawsk.net>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH intel-gpu-tools] tools: Added intel_dpio_read and intel_dpio_write
Date: Mon, 06 Aug 2012 14:21:17 -0700	[thread overview]
Message-ID: <95ccd39fcb0204058c18f497b88781ee@bwidawsk.net> (raw)
In-Reply-To: <20120806071652.GE5502@phenom.ffwll.local>

On 2012-08-06 00:16, Daniel Vetter wrote:
> On Thu, Aug 02, 2012 at 09:06:48AM -0700, Ben Widawsky wrote:
>> On 2012-08-02 05:07, Vijay Purushothaman wrote:
>> >In Valleyview the DPLL and lane control registers are accessible 
>> only
>> >through side band fabric called DPIO. Added two tools to read and
>> >write
>> >registers residing in this space.
>>
>> Could I convince you to use the centralized read/write mmio 
>> functions?
>> Otherwise, everything seems fine to me here.
>
> I wonder whether we need some kernel interface for this, after all if 
> the
> kernel touches this, too, things will blow up. Otoh the kernel only 
> uses
> the dpio sideband regs at modeset time, so I guess the risk is 
> minimal.
> -Daniel

It's the same as any register. As long as it's root only, bullets, gun, 
and
target for foot are provided for free. Though I would like to converge 
on
central API for register read and right.

-- 
Ben Widawsky, Intel Open Source Technology Center