From: Kishon Vijay Abraham I <kishon@ti.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Bjorn Helgaas <bhelgaas@google.com>,
<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
<lokeshvutla@ti.com>
Subject: Re: [PATCH 0/3] PCI/gic-v3-its: Add support for same ITS device ID for multiple PCIe devices
Date: Mon, 20 Sep 2021 16:52:48 +0530 [thread overview]
Message-ID: <96caa71f-2632-6eb7-e211-1c2f43a3be16@ti.com> (raw)
In-Reply-To: <871r5jwqw3.wl-maz@kernel.org>
Hi Marc,
On 20/09/21 2:44 pm, Marc Zyngier wrote:
> On Mon, 20 Sep 2021 07:41:30 +0100,
> Kishon Vijay Abraham I <kishon@ti.com> wrote:
>>
>> AM64 has an issue in that it doesn't trigger interrupt if the address
>> in the *pre_its_window* is not aligned to 8-bytes (this is due to an
>> invalid bridge configuration in HW).
>>
>> This means there will not be interrupts for devices with PCIe
>> requestor ID 0x1, 0x3, 0x5..., as the address in the pre-ITS window
>> would be 4 (1 << 2), 12 (3 << 2), 20 (5 << 2) respectively which are
>> not aligned to 8-bytes.
>>
>> The DT binding has specified "msi-map-mask" using which multiple PCIe
>> devices could be made to use the same ITS device ID.
>>
>> Add support in irq-gic-v3-its-pci-msi.c for such cases where multiple
>> PCIe devices are using the same ITS device ID.
>>
>> Kishon Vijay Abraham I (3):
>> PCI: Add support in pci_walk_bus() to invoke callback matching RID
>> PCI: Export find_pci_root_bus()
>> irqchip/gic-v3-its: Include "msi-map-mask" for calculating nvecs
>>
>> drivers/irqchip/irq-gic-v3-its-pci-msi.c | 21 ++++++++++++++++++++-
>> drivers/pci/bus.c | 13 +++++++++----
>> drivers/pci/host-bridge.c | 3 ++-
>> include/linux/pci.h | 8 ++++++--
>> 4 files changed, 37 insertions(+), 8 deletions(-)
>
> What I don't see in this series is how you address the other part of
> the problem, which is your reuse of the Socionext hack. Please post a
> complete series addressing all the issues for this HW.
No additional patches are pending. Socionext configuration is used as is
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/ti/k3-am64-main.dtsi#n72
FWIW the issue that I address in this series is not observed with standalone USB
cards or NVMe cards. The issue was observed when I tried with a multi-function
PCIe card.
Thank You,
Kishon
next prev parent reply other threads:[~2021-09-20 11:23 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-20 6:41 [PATCH 0/3] PCI/gic-v3-its: Add support for same ITS device ID for multiple PCIe devices Kishon Vijay Abraham I
2021-09-20 6:41 ` [PATCH 1/3] PCI: Add support in pci_walk_bus() to invoke callback matching RID Kishon Vijay Abraham I
2021-09-20 8:56 ` Marc Zyngier
2021-09-20 14:28 ` Kishon Vijay Abraham I
2021-09-20 18:01 ` Marc Zyngier
2021-09-22 1:26 ` Kishon Vijay Abraham I
2021-09-27 14:45 ` Marc Zyngier
2021-09-27 14:56 ` Kishon Vijay Abraham I
2021-09-20 6:41 ` [PATCH 2/3] PCI: Export find_pci_root_bus() Kishon Vijay Abraham I
2021-09-20 8:37 ` Marc Zyngier
2021-09-20 6:41 ` [PATCH 3/3] irqchip/gic-v3-its: Include "msi-map-mask" for calculating nvecs Kishon Vijay Abraham I
2021-09-20 8:36 ` Marc Zyngier
2021-09-20 9:14 ` [PATCH 0/3] PCI/gic-v3-its: Add support for same ITS device ID for multiple PCIe devices Marc Zyngier
2021-09-20 11:22 ` Kishon Vijay Abraham I [this message]
2021-09-20 11:36 ` Marc Zyngier
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