From: "Tian, Kevin" <kevin.tian@intel.com>
To: Ross Lagerwall <ross.lagerwall@citrix.com>,
"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: Sergey Dyasli <sergey.dyasli@citrix.com>,
Jan Beulich <jbeulich@suse.com>,
"Nakajima, Jun" <jun.nakajima@intel.com>,
Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: [PATCH v2] x86/vmx: Fix vmentry failure because of invalid LER on Broadwell
Date: Thu, 1 Jun 2017 02:08:07 +0000 [thread overview]
Message-ID: <AADFC41AFE54684AB9EE6CBC0274A5D190CF3E8A@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <20170530140504.22563-1-ross.lagerwall@citrix.com>
> From: Ross Lagerwall [mailto:ross.lagerwall@citrix.com]
> Sent: Tuesday, May 30, 2017 10:05 PM
>
> Occasionally, on certain Broadwell CPUs MSR_IA32_LASTINTTOIP has been
> observed to have the top three bits corrupted as though the MSR is using
> the LBR_FORMAT_EIP_FLAGS_TSX format. This is incorrect and causes a
> vmentry failure -- the MSR should contain an offset into the current
> code segment. This is assumed to be erratum BDF14. Workaround the issue
> by sign-extending into bits 48:63 for MSR_IA32_LASTINT{FROM,TO}IP.
>
> Signed-off-by: Ross Lagerwall <ross.lagerwall@citrix.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
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prev parent reply other threads:[~2017-06-01 2:08 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-30 14:05 [PATCH v2] x86/vmx: Fix vmentry failure because of invalid LER on Broadwell Ross Lagerwall
2017-05-30 14:17 ` Andrew Cooper
2017-05-30 14:55 ` Jan Beulich
2017-06-01 2:08 ` Tian, Kevin [this message]
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