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From: Paulo Zanoni <przanoni@gmail.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 1/3] drm/i915: PSR also doesn't have link_entry_time on SKL.
Date: Fri, 11 Dec 2015 17:09:20 -0200	[thread overview]
Message-ID: <CA+gsUGSOEVtuhWycBm8SjFLmjM3uNvJvXfAAeUcx5z+c1Qibeg@mail.gmail.com> (raw)
In-Reply-To: <1449764904-3229-1-git-send-email-rodrigo.vivi@intel.com>

2015-12-10 14:28 GMT-02:00 Rodrigo Vivi <rodrigo.vivi@intel.com>:
> This bit is also reserved on Skylake. Actually the only
> platform that supports this is Haswell, so let's fix
> this logic and apply this link entry time only for the
> platform that supports it, i.e. Haswell.
>
> This also changes the style to let more clear platform
> differences outside the reg write. We would probably catch
> this case sooner if separated, or not...
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_psr.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index 14cc2cf..9ccff30 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -276,10 +276,11 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp)
>          */
>         uint32_t idle_frames = max(6, dev_priv->vbt.psr.idle_frames);
>         uint32_t val = 0x0;
> -       const uint32_t link_entry_time = EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;
> +
> +       if (IS_HASWELL(dev))
> +               val |= EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;

It's kinda weird that we used the variable "val" for nothing. At least
we're using it now :). <insert bikeshed suggestion about either using
it for storing all bits or just kill it>

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

>
>         I915_WRITE(EDP_PSR_CTL, val |
> -                  (IS_BROADWELL(dev) ? 0 : link_entry_time) |
>                    max_sleep_time << EDP_PSR_MAX_SLEEP_TIME_SHIFT |
>                    idle_frames << EDP_PSR_IDLE_FRAME_SHIFT |
>                    EDP_PSR_ENABLE);
> --
> 2.4.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2015-12-11 19:09 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-10 16:28 [PATCH 1/3] drm/i915: PSR also doesn't have link_entry_time on SKL Rodrigo Vivi
2015-12-10 16:28 ` [PATCH 2/3] drm/i915: Instrument PSR parameter for possible quirks with link standby Rodrigo Vivi
2015-12-11 16:19   ` Daniel Vetter
2015-12-11  8:49     ` [PATCH] " Rodrigo Vivi
2015-12-11 19:55       ` Paulo Zanoni
2015-12-11 21:17         ` Vivi, Rodrigo
2015-12-10 16:28 ` [PATCH 3/3] drm/i915: Enable PSR by default Rodrigo Vivi
2015-12-11  9:28   ` [PATCH] " Rodrigo Vivi
2015-12-11 19:09 ` Paulo Zanoni [this message]
2015-12-11 19:14   ` [PATCH 1/3] drm/i915: PSR also doesn't have link_entry_time on SKL Vivi, Rodrigo

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