Re: [PATCH RFC v3 00/12] drm/msm: generate register header files

From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Rob Clark <robdclark@gmail.com>
Cc: Masahiro Yamada <masahiroy@kernel.org>,
	Nathan Chancellor <nathan@kernel.org>,
	 Nicolas Schier <nicolas@fjasle.eu>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	 Sean Paul <sean@poorly.run>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	 David Airlie <airlied@gmail.com>,
	Daniel Vetter <daniel@ffwll.ch>,
	linux-kbuild@vger.kernel.org,  linux-arm-msm@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	 freedreno@lists.freedesktop.org
Subject: Re: [PATCH RFC v3 00/12] drm/msm: generate register header files
Date: Fri, 15 Mar 2024 23:40:58 +0200	[thread overview]
Message-ID: <CAA8EJppek+zDUxE9q9NivE7T1KHigP80NOfy0oLYJd8z_DdoXA@mail.gmail.com> (raw)
In-Reply-To: <CAF6AEGuc-xu_Ji5fOXCFFudos1Ah4tgFxjRs0neHVujtNdXB+A@mail.gmail.com>

On Fri, 15 Mar 2024 at 22:02, Rob Clark <robdclark@gmail.com> wrote:
>
> On Fri, Mar 15, 2024 at 4:46 AM Dmitry Baryshkov
> <dmitry.baryshkov@linaro.org> wrote:
> >
> > Currently display-related register headers are generated from XML files
> > shipped withing Mesa source tree. This is not fully optimal: it requires
> > multi-stage process of the changes first being landed to Mesa and only
> > then synced to the kernel tree.
>
> I think we'd more or less need to continue following this process for
> the gpu .xml so that the kernel and mesa are not diverging.  I guess
> we could drop the display related .xml from mesa.  (But it would be
> nice to have a decoder tool for display devcoredumps, like we do for
> gpu..)

Yes.  But syncing XMLs is much easier compared to syncing the generated headers.

For display-relaed headers, that's a good question, whether we want to
drop them from mesa or not. I think it might be easier (and more
logical) to get such a tool into the kernel. Note, that it will also
require us to describe DPU registers in the XML format. And also maybe
to sort out the DSI registers finally.

>
> BR,
> -R
>
> > Move original XML files to the kernel tree and generate header files
> > when required.
> >
> > NOTE: the gen_header.py script is based on the non-merged Mesa MR [1].
> > Once that MR lands, I will update the script and commit messages and
> > send the next iteration.
> >
> > [1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28193
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> > Changes in v3:
> > - Split XML and git rm patches in hope to pass ML limitations
> > - Link to v2: https://lore.kernel.org/r/20240315-fd-xml-shipped-v2-0-7cd68ecc4320@linaro.org
> >
> > Changes in v2:
> > - Removed the _shipped files, always generating the headers (Masahiro
> >   Yamada)
> > - Replaced headergen2 with gen_headers.py
> > - Simplify Makefile rules, making all Adreno objects depend on Adreno
> >   headers and all displau objects depend on all display headers
> > - Also handle Adreno registers
> > - Link to v1: https://lore.kernel.org/r/20240226-fd-xml-shipped-v1-0-86bb6c3346d2@linaro.org
> >
> > ---
> > Dmitry Baryshkov (12):
> >       drm/msm/mdp5: add writeback block bases
> >       drm/msm/hdmi: drop qfprom.xml.h
> >       drm/msm/dsi: drop mmss_cc.xml.h
> >       drm/msm: move msm_gpummu.c to adreno/a2xx_gpummu.c
> >       drm/msm: import XML display registers database
> >       drm/msm: import A2xx-A4xx XML display registers database
> >       drm/msm: import A5xx-A7xx XML display registers database
> >       drm/msm: import gen_header.py script from Mesa
> >       drm/msm: generate headers on the fly
> >       drm/msm: drop display-related headers
> >       drm/msm: drop A5xx, A6xx headers
> >       drm/msm: drop A2xx-A4xx headers
> >
> >  drivers/gpu/drm/msm/.gitignore                     |     6 +
> >  drivers/gpu/drm/msm/Makefile                       |    97 +-
> >  drivers/gpu/drm/msm/adreno/a2xx.xml.h              |  3251 -----
> >  drivers/gpu/drm/msm/adreno/a2xx_gpu.c              |     4 +-
> >  drivers/gpu/drm/msm/adreno/a2xx_gpu.h              |     4 +
> >  .../drm/msm/{msm_gpummu.c => adreno/a2xx_gpummu.c} |    45 +-
> >  drivers/gpu/drm/msm/adreno/a3xx.xml.h              |  3268 -----
> >  drivers/gpu/drm/msm/adreno/a4xx.xml.h              |  4379 -------
> >  drivers/gpu/drm/msm/adreno/a5xx.xml.h              |  5572 ---------
> >  drivers/gpu/drm/msm/adreno/a6xx.xml.h              | 11858 -------------------
> >  drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h          |   422 -
> >  drivers/gpu/drm/msm/adreno/adreno_common.xml.h     |   539 -
> >  drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h        |  2803 -----
> >  drivers/gpu/drm/msm/disp/mdp4/mdp4.xml.h           |  1181 --
> >  drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h           |  1979 ----
> >  drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h           |    11 +
> >  drivers/gpu/drm/msm/disp/mdp_common.xml.h          |   111 -
> >  drivers/gpu/drm/msm/dsi/dsi.xml.h                  |   790 --
> >  drivers/gpu/drm/msm/dsi/dsi_phy_10nm.xml.h         |   227 -
> >  drivers/gpu/drm/msm/dsi/dsi_phy_14nm.xml.h         |   309 -
> >  drivers/gpu/drm/msm/dsi/dsi_phy_20nm.xml.h         |   237 -
> >  drivers/gpu/drm/msm/dsi/dsi_phy_28nm.xml.h         |   384 -
> >  drivers/gpu/drm/msm/dsi/dsi_phy_28nm_8960.xml.h    |   286 -
> >  drivers/gpu/drm/msm/dsi/dsi_phy_7nm.xml.h          |   483 -
> >  drivers/gpu/drm/msm/dsi/mmss_cc.xml.h              |   131 -
> >  drivers/gpu/drm/msm/dsi/sfpb.xml.h                 |    70 -
> >  drivers/gpu/drm/msm/hdmi/hdmi.xml.h                |  1399 ---
> >  drivers/gpu/drm/msm/hdmi/qfprom.xml.h              |    61 -
> >  drivers/gpu/drm/msm/msm_drv.c                      |     3 +-
> >  drivers/gpu/drm/msm/msm_gpu.c                      |     2 +-
> >  drivers/gpu/drm/msm/msm_mmu.h                      |     5 -
> >  drivers/gpu/drm/msm/registers/adreno/a2xx.xml      |  1865 +++
> >  drivers/gpu/drm/msm/registers/adreno/a3xx.xml      |  1751 +++
> >  drivers/gpu/drm/msm/registers/adreno/a4xx.xml      |  2409 ++++
> >  drivers/gpu/drm/msm/registers/adreno/a5xx.xml      |  3039 +++++
> >  drivers/gpu/drm/msm/registers/adreno/a6xx.xml      |  4969 ++++++++
> >  drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml  |   228 +
> >  .../gpu/drm/msm/registers/adreno/adreno_common.xml |   399 +
> >  .../gpu/drm/msm/registers/adreno/adreno_pm4.xml    |  2267 ++++
> >  drivers/gpu/drm/msm/registers/display/dsi.xml      |   390 +
> >  .../gpu/drm/msm/registers/display/dsi_phy_10nm.xml |   102 +
> >  .../gpu/drm/msm/registers/display/dsi_phy_14nm.xml |   135 +
> >  .../gpu/drm/msm/registers/display/dsi_phy_20nm.xml |   100 +
> >  .../gpu/drm/msm/registers/display/dsi_phy_28nm.xml |   180 +
> >  .../msm/registers/display/dsi_phy_28nm_8960.xml    |   134 +
> >  .../gpu/drm/msm/registers/display/dsi_phy_7nm.xml  |   230 +
> >  drivers/gpu/drm/msm/registers/display/edp.xml      |   239 +
> >  drivers/gpu/drm/msm/registers/display/hdmi.xml     |  1015 ++
> >  drivers/gpu/drm/msm/registers/display/mdp4.xml     |   504 +
> >  drivers/gpu/drm/msm/registers/display/mdp5.xml     |   806 ++
> >  .../gpu/drm/msm/registers/display/mdp_common.xml   |    89 +
> >  drivers/gpu/drm/msm/registers/display/msm.xml      |    32 +
> >  drivers/gpu/drm/msm/registers/display/sfpb.xml     |    17 +
> >  .../gpu/drm/msm/registers/freedreno_copyright.xml  |    40 +
> >  drivers/gpu/drm/msm/registers/gen_header.py        |   958 ++
> >  drivers/gpu/drm/msm/registers/rules-ng.xsd         |   457 +
> >  56 files changed, 22480 insertions(+), 39792 deletions(-)
> > ---
> > base-commit: 8ffc8b1bbd505e27e2c8439d326b6059c906c9dd
> > change-id: 20240225-fd-xml-shipped-ba9a321cdedf
> >
> > Best regards,
> > --
> > Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> >

-- 
With best wishes
Dmitry