From: Joel Stanley <joel@jms.id.au>
To: Havard Skinnemoen <hskinnemoen@google.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm <qemu-arm@nongnu.org>,
QEMU Developers <qemu-devel@nongnu.org>,
kfting@nuvoton.com, Avi Fishman <Avi.Fishman@nuvoton.com>
Subject: Re: [PATCH 2/6] hw/misc: Add NPCM7xx System Global Control Registers device model
Date: Tue, 9 Jun 2020 01:36:14 +0000 [thread overview]
Message-ID: <CACPK8XcYNmBYb+OXKZP1sSHqC-1pTN4=S+B7TdOapYkmEC18SA@mail.gmail.com> (raw)
In-Reply-To: <20200521192133.127559-3-hskinnemoen@google.com>
On Thu, 21 May 2020 at 20:40, Havard Skinnemoen <hskinnemoen@google.com> wrote:
>
> Implement a device model for the System Global Control Registers in the
> NPCM730 and NPCM750 BMC SoCs.
>
> This is primarily used to enable SMP boot (the boot ROM spins reading
> the SCRPAD register); other registers are best effort for now.
>
> The reset values of the MDLR and PWRON registers are determined by the
> SoC variant (730 vs 750) and board straps respectively.
>
> Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
This looks similar to the aspeed scu model :)
Reviewed-by: Joel Stanley <joel@jms.id.au>
next prev parent reply other threads:[~2020-06-09 1:43 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-21 19:21 [PATCH 0/6] Add Nuvoton NPCM730/NPCM750 SoCs and two BMC machines Havard Skinnemoen
2020-05-21 19:21 ` [PATCH 1/6] npcm7xx: Add config symbol Havard Skinnemoen
2020-06-09 1:36 ` Joel Stanley
2020-05-21 19:21 ` [PATCH 2/6] hw/misc: Add NPCM7xx System Global Control Registers device model Havard Skinnemoen
2020-06-09 1:36 ` Joel Stanley [this message]
2020-06-09 7:24 ` Cédric Le Goater
2020-05-21 19:21 ` [PATCH 3/6] hw/misc: Add NPCM7xx Clock Controller " Havard Skinnemoen
2020-06-09 1:36 ` Joel Stanley
2020-06-09 7:24 ` Cédric Le Goater
2020-05-21 19:21 ` [PATCH 4/6] hw/timer: Add NPCM7xx Timer " Havard Skinnemoen
2020-06-09 1:36 ` Joel Stanley
2020-05-21 19:21 ` [PATCH 5/6] hw/arm: Add NPCM730 and NPCM750 SoC models Havard Skinnemoen
2020-06-09 1:36 ` Joel Stanley
2020-06-09 7:24 ` Cédric Le Goater
2020-06-09 23:06 ` Havard Skinnemoen
2020-06-11 6:12 ` Cédric Le Goater
2020-06-11 9:38 ` Peter Maydell
2020-06-17 15:24 ` Cédric Le Goater
2020-05-21 19:21 ` [PATCH 6/6] hw/arm: Add two NPCM7xx-based machines Havard Skinnemoen
2020-06-09 1:36 ` Joel Stanley
2020-06-09 7:24 ` Cédric Le Goater
2020-05-22 4:57 ` [PATCH 0/6] Add Nuvoton NPCM730/NPCM750 SoCs and two BMC machines no-reply
2020-06-08 22:14 ` Havard Skinnemoen
2020-06-09 1:39 ` Joel Stanley
2020-06-09 16:36 ` Havard Skinnemoen
2020-06-09 7:31 ` Cédric Le Goater
2020-06-09 9:38 ` Peter Maydell
2020-06-09 16:30 ` Havard Skinnemoen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CACPK8XcYNmBYb+OXKZP1sSHqC-1pTN4=S+B7TdOapYkmEC18SA@mail.gmail.com' \
--to=joel@jms.id.au \
--cc=Avi.Fishman@nuvoton.com \
--cc=hskinnemoen@google.com \
--cc=kfting@nuvoton.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.