Re: [PATCH 1/2] arm64: dts: qcom: sc7180: Fix trogdor qspi pull direction

From: Stephen Boyd <swboyd@chromium.org>
To: Bjorn Andersson <andersson@kernel.org>,
	Douglas Anderson <dianders@chromium.org>
Cc: amstan@chromium.org, mka@chromium.org,
	Andy Gross <agross@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Rob Clark <robdclark@chromium.org>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] arm64: dts: qcom: sc7180: Fix trogdor qspi pull direction
Date: Wed, 15 Feb 2023 21:46:52 -0800	[thread overview]
Message-ID: <CAE-0n51OSS=Nh2pZmPO3mg4QCvqGZsJ+AFBTAUGr-TZBHCPLCw@mail.gmail.com> (raw)
In-Reply-To: <20230213165743.1.I6f03f86546e6ce9abb1d24fd9ece663c3a5b950c@changeid>

Quoting Douglas Anderson (2023-02-13 16:57:51)
> Though it shouldn't matter very much, we've decided that it's slightly
> better to park the qspi lines for trogdor with an internal pulldown
> instead of an internal pullup. There was a footnote that Cr50 (which
> connects to these lines too) may have pulldowns configured on one of
> the data lines and we don't want to have fighting pulls.

Ok.

> This also
> means that if the pulls somehow get left powered in S3 (which I'm
> uncertain about) that they won't be pulling up lines on an unpowered
> SPI part.

As far as I know, the pulls are maintained in S3. There's verbage about
"keeper" on the pins.

The SPI part is powered in S3 though. I believe it only loses power in
S5. Can you reword this statement?

The fighting pulls should be resolved though. Or maybe it is better to
simply not put any pull on the line? Presumably the pull is there to
avoid seeing 0->1 transitions on the data lines when inactive, but I'm
not really convinced that is going to happen because the SPI chip itself
would have to be doing that driving, and the chip select isn't changing.

>
> Originally the pullup was picked because SPI transfers are active low
> and thus the high state is somewhat more "idle", but that really isn't
> that important because the chip select won't be asserted when the bus
> is idle. The chip select has a nice external pullup on it that's
> powered by the same power rail as the SPI flash.
>
> This shouldn't have any functionality impact w/ reading/writing the
> SPI since the lines are always push-pull when SPI transfers are
> actually taking place.
>

Right.