Re: [Qemu-devel] [PATCH v1 3/5] cadence_gem: Only trigger interrupts if the status register is set

From: Peter Maydell <peter.maydell@linaro.org>
To: Alistair Francis <alistair.francis@xilinx.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v1 3/5] cadence_gem: Only trigger interrupts if the status register is set
Date: Tue, 11 Apr 2017 10:05:37 +0100	[thread overview]
Message-ID: <CAFEAcA_E0vM9HE1=5DVhw9cA-BYea1wR2M1LHEXs1L+-Q5vUCg@mail.gmail.com> (raw)
In-Reply-To: <CAKmqyKOXoMRQbe+qEroxZxVPh06JU6vbZJ1wddBb_8imPeD-1A@mail.gmail.com>

On 10 April 2017 at 23:23, Alistair Francis <alistair.francis@xilinx.com> wrote:
> On Mon, Apr 10, 2017 at 5:44 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
>> Also the comment says "raise or lower interrupt based on current
>> status", but the code will only ever do qemu_set_irq(..., 1),
>> never 0. Which is right?
>
> This is a little confusing. The interrupts are lowered when the ISR is
> read, so the assumption was that we never need to clear them in the
> gem_update_int_status(). Although then if we perform a reset nothing
> will clear the interrupts until the ISR is read from.

On QEMU reset the other end will be reset anyway so it will
update its idea of whether the irq is asserted (and calling
qemu_set_irq in a reset function is generally not a good idea).
If the device has guest-programmable reset of some kind you'd
need to clear the irq lines then, though.

thanks
-- PMM