From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PATCH 11/19] target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmac
Date: Thu, 20 Feb 2020 16:41:49 +0000 [thread overview]
Message-ID: <CAFEAcA_Qy48f786knq+dgu9DE6xCqD2N1nqytd-PkhPdX5XtJw@mail.gmail.com> (raw)
In-Reply-To: <CAFEAcA-fDx8HAFcgx57FhnpHPY6GnC1PxRRW=sLRY=5dDysfiQ@mail.gmail.com>
On Thu, 20 Feb 2020 at 16:37, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> On Fri, 14 Feb 2020 at 18:16, Richard Henderson
> <richard.henderson@linaro.org> wrote:
> >
> > All remaining tests for VFP4 are for fused multiply-add insns.
> >
> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> > ---
> > target/arm/cpu.h | 5 +++++
> > target/arm/translate-vfp.inc.c | 12 ++++++++----
> > target/arm/translate.c | 2 +-
> > 3 files changed, 14 insertions(+), 5 deletions(-)
> >
> > diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> > index 4ff28418df..f27b8e35df 100644
> > --- a/target/arm/cpu.h
> > +++ b/target/arm/cpu.h
> > @@ -3468,6 +3468,11 @@ static inline bool isar_feature_aa32_fp16_dpconv(const ARMISARegisters *id)
> > return FIELD_EX32(id->mvfr1, MVFR1, FPHP) > 1;
> > }
> >
> > +static inline bool isar_feature_aa32_simdfmac(const ARMISARegisters *id)
> > +{
> > + return FIELD_EX32(id->mvfr1, MVFR1, SIMDFMAC) != 0;
> > +}
>
> This is tricky, because the SIMDFMAC register
> field indicates "do we have fused-multiply-accumulate
> for either VFP or Neon", so in a VFP-no-Neon core or
> a Neon-no-VFP core it will be 1 but can't be used on its
> own as a gate on "should this insn be present".
>
> Currently in the part of arm_cpu_realize() which handles
> the user having selected vfp=off and/or neon=off we
> do allow (for AArch32 cores) both of those combinations.
>
> trans_VFM_dp already tests aa32_fpdp_v2, so I think the
> main thing we need to do is add a test on aa32_fpsp_v2 to
> trans_VFM_sp.
>
> We clear the SIMDFMAC field to 0 in the !has_neon condition,
> and I think that should actually be in the !neon && !vfp part.
>
> I propose to squash in the following and beef up the commit message:
>
> + /* Despite the name, this field covers both VFP and Neon */
> + u = cpu->isar.mvfr1;
> + u = FIELD_DP32(u, MVFR1, SIMDFMAC, 0);
> + cpu->isar.mvfr1;
... "cpu->isar.mvfr1 = u;", obviously.
> - if (!dc_isar_feature(aa32_simdfmac, s)) {
> + if (!dc_isar_feature(aa32_simdfmac, s) ||
> + !dc_isar_feature(aa32_fpsp_v2, s)) {
> + return false;
> + }
and not that extra "}".
-- PMM
next prev parent reply other threads:[~2020-02-20 16:42 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-14 18:15 [PATCH 00/19] target/arm: vfp feature and decodetree cleanup Richard Henderson
2020-02-14 18:15 ` [PATCH 01/19] target/arm: Fix field extract from MVFR[0-2] Richard Henderson
2020-02-14 18:29 ` Philippe Mathieu-Daudé
2020-02-14 18:35 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 02/19] target/arm: Rename isar_feature_aa32_simd_r32 Richard Henderson
2020-02-14 18:50 ` Philippe Mathieu-Daudé
2020-02-21 15:58 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 03/19] target/arm: Use isar_feature_aa32_simd_r32 more places Richard Henderson
2020-02-21 16:02 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 04/19] target/arm: Set MVFR0.FPSP for ARMv5 cpus Richard Henderson
2020-02-21 16:02 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 05/19] target/arm: Add isar_feature_aa32_simd_r16 Richard Henderson
2020-02-21 16:01 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 06/19] target/arm: Rename isar_feature_aa32_fpdp_v2 Richard Henderson
2020-02-14 18:51 ` Philippe Mathieu-Daudé
2020-02-14 18:15 ` [PATCH 07/19] target/arm: Add isar_feature_aa32_{fpsp_v2, fpsp_v3, fpdp_v3} Richard Henderson
2020-02-21 16:03 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 08/19] target/arm: Perform fpdp_v2 check first Richard Henderson
2020-02-21 16:04 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 09/19] target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}_v3 Richard Henderson
2020-02-21 16:05 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 10/19] target/arm: Add missing checks for fpsp_v2 Richard Henderson
2020-02-21 16:05 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 11/19] target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmac Richard Henderson
2020-02-20 16:37 ` Peter Maydell
2020-02-20 16:41 ` Peter Maydell [this message]
2020-02-20 17:55 ` Richard Henderson
2020-02-14 18:15 ` [PATCH 12/19] target/arm: Remove ARM_FEATURE_VFP check from disas_vfp_insn Richard Henderson
2020-02-20 17:19 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 13/19] target/arm: Move VLLDM and VLSTM to vfp.decode Richard Henderson
2020-02-20 17:02 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 14/19] target/arm: Move the vfp decodetree calls next to the base isa Richard Henderson
2020-02-20 17:16 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 15/19] linux-user/arm: Replace ARM_FEATURE_VFP* tests for HWCAP Richard Henderson
2020-02-20 17:32 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 16/19] target/arm: Remove ARM_FEATURE_VFP* Richard Henderson
2020-02-20 17:33 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 17/19] target/arm: Add formats for some vfp 2 and 3-register insns Richard Henderson
2020-02-20 17:40 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 18/19] target/arm: Split VFM decode Richard Henderson
2020-02-20 17:45 ` Peter Maydell
2020-02-14 18:15 ` [PATCH 19/19] target/arm: Split VMINMAXNM decode Richard Henderson
2020-02-20 17:49 ` Peter Maydell
2020-02-14 20:11 ` [PATCH 00/19] target/arm: vfp feature and decodetree cleanup no-reply
2020-02-20 17:52 ` Peter Maydell
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