Re: [PATCH v3 3/3] ARM: dts: rk3288: add VOP iommu nodes

From: Daniel Kurtz <djkurtz@chromium.org>
To: "Heiko Stübner" <heiko@sntech.de>
Cc: "Stéphane Marchesin" <marcheu@chromium.org>,
	"Grant Grundler" <grundler@chromium.org>,
	"Simon Xue" <xxm@rock-chips.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Pawel Moll" <pawel.moll@arm.com>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Ian Campbell" <ijc+devicetree@hellion.org.uk>,
	"Kumar Gala" <galak@codeaurora.org>,
	"Russell King" <linux@arm.linux.org.uk>,
	"moderated list:ARM/Rockchip SoC..."
	<linux-arm-kernel@lists.infradead.org>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	"open list:OPEN FIRMWARE AND..." <devicetree@vger.kernel.org>,
	"open list" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 3/3] ARM: dts: rk3288: add VOP iommu nodes
Date: Tue, 14 Oct 2014 15:22:24 +0800	[thread overview]
Message-ID: <CAGS+omCtRup=a+QiEZF9jk3pkJ6whtO9Ycoxa0Y7nnh2sWAphA@mail.gmail.com> (raw)
In-Reply-To: <4094180.e6s5oT6HgP@phil>

[-- Attachment #1: Type: text/plain, Size: 1938 bytes --]

On Tue, Oct 14, 2014 at 6:33 AM, Heiko Stübner <heiko@sntech.de> wrote:

> Hi Daniel,
>
> Am Samstag, 11. Oktober 2014, 02:30:48 schrieb Daniel Kurtz:
> > Add device nodes for the VOP iommus.
> > Device nodes for other iommus will be added in later patches.
> >
> > The iommu nodes use the #iommu-cells property as described in:
> >   Documentation/devicetree/bindings/iommu/iommu.txt
> >
> > Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
> > Signed-off-by: Simon Xue <xxm@rock-chips.com>
> > ---
> >  arch/arm/boot/dts/rk3288.dtsi | 18 ++++++++++++++++++
> >  1 file changed, 18 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/rk3288.dtsi
> b/arch/arm/boot/dts/rk3288.dtsi
> > index 5950b0a..cbc92fa 100644
> > --- a/arch/arm/boot/dts/rk3288.dtsi
> > +++ b/arch/arm/boot/dts/rk3288.dtsi
> > @@ -271,6 +271,24 @@
> >               status = "disabled";
> >       };
> >
> > +     vopb_mmu: iommu@0xff930300 {
>
> please use the address without the 0x here ... iommu@ff930300
>

I've been doing it wrong for a while and noone else noticed :-).  Thanks!
I will resend.

> Thanks
> Heiko
>
> > +             compatible = "rockchip,iommu";
> > +             reg = <0xff930300 0x100>;
> > +             interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
> > +             interrupt-names = "vopb_mmu";
> > +             #iommu-cells = <0>;
> > +             status = "disabled";
> > +     };
> > +
> > +     vopl_mmu: iommu@0xff940300 {
> > +             compatible = "rockchip,iommu";
> > +             reg = <0xff940300 0x100>;
> > +             interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
> > +             interrupt-names = "vopl_mmu";
> > +             #iommu-cells = <0>;
> > +             status = "disabled";
> > +     };
> > +
> >       gic: interrupt-controller@ffc01000 {
> >               compatible = "arm,gic-400";
> >               interrupt-controller;
>
>

[-- Attachment #2: Type: text/html, Size: 3079 bytes --]